ONET9901TA Datasheet, PDF (2/13 Pages) Texas Instruments – 10.7-GBPS TRANSIMPEDANCE AMPLIFIER WITH RSSI

ONET9901TA
10.7ĆGbps TRANSIMPEDANCE AMPLIFIER WITH RSSI
SLLS615 − APRIL 2004
block diagram
The ONET9901TA is a high performance 10.7-Gbps transimpedance amplifier that can be segmented into the
signal path, filter, and offset cancellation block. The signal path consists of a transimpedance amplifier stage,
a voltage amplifier, and an output buffer. The filter circuit provides a filtered VCC for the photodiode. The offset
correction circuit uses an internal low-pass filter to cancel the dc on the input and it provides a signal to monitor
the received signal strength. A simplified block diagram of the ONET9901TA is shown in Figure 1.
VCCI
FILTER
TEST
IN
GND
410 W
Disable
Offset
Cancellation
1 kW
RF
Transimpedance
Amplifier
+
−
Voltage
Amplifier
Bandgap
Voltage Reference
and Bias Current
Generation
+
−
CML
Output
Buffer
RSSI
VCCO
OUT+
OUT−
Figure 1. Block Diagram
signal path
The first stage of the signal path is a transimpedance amplifier that takes the photodiode current and converts
it to a voltage signal. The second stage is a voltage amplifier that provides additional gain. The output of the
second stage feeds the output buffer and the offset cancellation circuitry. The third and final signal path stage
of the ONET9901TA is the output buffer. The output buffer provides CML outputs with an on-chip 50-Ω
back-termination to VCCO.
filter circuitry
The filter pin provides a filtered VCC for the photodiode bias. The on-chip low-pass filter for the photodiode VCC
is implemented using a filter resistor of 410 Ω and an internal capacitor. If additional filtering is required for the
application, an external capacitor should be connected to the FILTER pin.
offset cancellation and RSSI
The offset cancellation circuitry performs low pass filtering of the output of the voltage amplifier. This senses
the dc offset at the input of the ONET9901TA. The circuitry subtracts current from the input to effectively cancel
the dc. The sensed current is mirrored and is used to generate the RSSI output through an external 10-kΩ
resistor. To disable the offset correction loop, the FILTER pin should be tied to GND.
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