LP2983_15 Datasheet, PDF (2/18 Pages) Texas Instruments – LP2983 Micropower 150 mA Voltage Regulator in SOT-23 Package For Output Voltages ≤ 1.2V Designed for Use with Very Low ESR Output Capacitors

LP2983
SNVS170C – OCTOBER 2001 – REVISED APRIL 2013
Connection Diagram
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Figure 1. 5-Lead Small Outline Package (SOT-23)
Pin Functions
Pin
V_IN
GND
ON/OFF
ESR
V_OUT
Pin
Number
1
2
3
4
5
Pin Descriptions
Function
Input Voltage
Common Ground (device substrate)
Logic high enable input
Low side connection for low-ESR output capacitors
Regulated Output Voltage
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings ⁽¹⁾
Storage Temperature Range
Operating Junction Temperature Range
Lead Temp. (Soldering, 5 sec.)
ESD Rating ⁽²⁾
Power Dissipation ⁽³⁾
Input Supply Voltage (Survival)
Input Supply Voltage (Operating)
Shutdown Input Voltage (Survival)
Output Voltage Survival, ⁽⁴⁾
I_OUT (Survival)
Input-Output Voltage Survival,⁽⁵⁾
−65°C to +150°C
−40°C to +125°C
260°C
2 kV
Internally Limited
−0.3V to +16V
2.2V to +16V
−0.3V to +16V
−0.3V to +9V
Short Circuit Protected
−0.3V to +16V
(1) “Absolute Maximum Ratings” indicate limits beyond which damage to the component may occur. Electrical specifications do not apply
when operating the device outside of its rated operating conditions.
(2) The ESD rating of pin 3 is 1 kV.
(3) The maximum allowable power dissipation is a function of the maximum junction temperature, T_J(MAX), the junction-to-ambient thermal
resistance, θ_J-A, and the ambient temperature, T_A. The maximum allowable power dissipation at any ambient temperture is calculated
using:
P(MAX)
=
T_J(MAX)
θ_J-A
-
T_A
Where the value of θ_J-A for the SOT-23 package is 240°C/W in a typical PC board mounting. Exceeding the maximum allowable
dissipation will cause excessive die temperature, and the regulator will go into thermal shutdown.
(4) If used in a dual-supply system where the regulator load is returned to a negative supply, the LP2983 output must be diode-clamped to
ground.
(5) The output PNP structure contains a diode between the V_IN to V_OUT terminals that is normally reverse-biased. Reversing the polarity
from V_IN to V_OUT will turn on this diode and possibly cause a destructive latch-up condition (see Application Hints).
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