LMC6042IMX Datasheet, PDF (2/24 Pages) Texas Instruments – LMC6042 CMOS Dual Micropower Operational Amplifier

LMC6042
SNOS611E – AUGUST 1999 – REVISED MARCH 2013
www.ti.com
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
Absolute Maximum Ratings ⁽¹⁾⁽²⁾
Differential Input Voltage
Supply Voltage (V⁺ − V^−)
Output Short Circuit to V⁺
Output Short Circuit to V^−
Lead Temperature (Soldering, 10 seconds)
Current at Input Pin
Current at Output Pin
Current at Power Supply Pin
Power Dissipation
Storage Temperature Range
Junction Temperature ⁽⁵⁾
ESD Tolerance ⁽⁶⁾
Voltage at Input/Output Pin
±Supply Voltage
16V
See ⁽³⁾
See ⁽⁴⁾
260°C
±5 mA
±18 mA
35 mA
See ⁽⁵⁾
−65°C to +150°C
110°C
500V
(V⁺) + 0.3V, (V^−) − 0.3V
(1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Conditions indicate conditions for
which the device is intended to be functional, but do not ensure specific performance limits. For ensured specifications and test
conditions, see the Electrical Characteristics. The ensured specifications apply only for the test conditions listed.
(2) If Military/Aerospace specified devices are required, please contact the TI Sales Office/Distributors for availability and specifications.
(3) Do not connect output to V⁺when V⁺ is greater than 13V or reliability may be adversely affected.
(4) Applies to both single-supply operation. Continuous short circuit operation at elevated ambient temperature can result in exceeding the
maximum allowed junction temperature of 110°C. Output currents in excess of ±30 mA over long term may adversely affect reliability.
(5) The maximum power dissipation is a function of T_J(Max), θ_JA, and T_A. The maximum allowable power dissipation at any ambient
temperature is P_D = (T_J(Max) − T_A)/θ_JA.
(6) Human body model, 1.5 kΩ in series with 100 pF.
Operating Ratings
Temperature Range
Supply Voltage
Power Dissipation
Thermal Resistance (θ_JA), ⁽²⁾
LMC6042AI, LMC6042I
8-Pin PDIP
8-Pin SOIC
8-Pin CDIP
−40°C ≤ T_J ≤ +85°C
4.5V ≤ V⁺ ≤ 15.5V
See ⁽¹⁾
101°C/W
165°C/W
115°C/W
(1) For operating at elevated temperatures the device must be derated based on the thermal resistance θ_JA with P_D = (T_J − T_A)/θ_JA.
(2) All numbers apply for packages soldered directly into a PC board.
Electrical Characteristics
Unless otherwise specified, all limits ensured for T_A = T_J = 25°C. Boldface limits apply at the temperature extremes. V⁺ = 5V,
V^− = 0V, V_CM = 1.5V, V_O = V⁺/2 and R_L > 1M unless otherwise specified.
Symbol
Parameter
Conditions
Typical ⁽¹⁾
LMC6042AI
Limit ⁽²⁾
LMC6042I
Limit ⁽²⁾
Units
(Limit)
V_OS
Input Offset Voltage
1
3
6
mV
3.3
6.3
Max
TCV_OS
Input Offset Voltage
Average Drift
1.3
μV/°C
I_B
Input Bias Current
I_OS
Input Offset Current
R_IN
Input Resistance
0.002
4
0.001
2
>10
4
pA (Max)
2
pA (Max)
TeraΩ
(1) Typical values represent the most likely parametric norm.
(2) All limits are specified at room temperature (standard type face) or at operating temperature extremes (bold face type).
2
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