GC5322 Datasheet, PDF (2/6 Pages) Texas Instruments – GC5322 Wideband Digital Predistortion Transmit Processor

GC5322
SLWS208 – JANUARY 2008
www.ti.com
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
AVAILABLE OPTIONS
PACKAGED DEVICE⁽¹⁾
T_A
352-ball S-PBGA package, 27 mm × 27 mm
(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI
Web site at www.ti.com.
GC5322 FUNCTIONAL BLOCK DIAGRAM
GC5322
TCK
RESETB SYNC SYNC INT UPDATA UPADDR OEB RDB WRB CEB TRSTB TDO
3 ^OUT
16
10
TDI
TMS ₄
BBin
16
BBFR
MFIO[19:18]
2
(Optional;
additional
2 LSBs)
IPDL
Detect
Gain
Pilot
Insertion
AntCal
Insertion
Power
Meter
Medium ^{NarrowBand DUC}
Band NarrowBand DUC
Wide DUC _{NarrowBand DUC}
Band
DUC Medium ^{NarrowBand DUC}
Band NarrowBand DUC
DUC _{NarrowBand DUC}
+
Medium ^{NarrowBand DUC}
Band NarrowBand DUC
Wide DUC _{NarrowBand DUC}
Band
DUC Medium ^{NarrowBand DUC}
Band NarrowBand DUC
DUC _{NarrowBand DUC}
CFR
MPU Interface
Fractional
Farrow
Resampler
Circular
Limiter
FB
(LVDS)
18 Pairs
ADC
Interface
Real to Complex
(or Bypass)
Feedback
Equalizer
Feedback NL
Correction
TX
(LVDS)
19 Pairs
DAC
Interface
Bulk Interpolation
+ Mixer
Transmit
Equalizer
DPD
Capture Buffers
JTAG
BB
PLL
DPD
PLL
BBCLK
DPDCLK
(LVDS)
SYNCD
(LVDS)
DUCs in
1-Chn Mode
DUCs in
2-Chn Mode
DUCs in
6-Chn Mode
BB Clock Domain
DPD Clock Domain
B0279-01
2
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