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DS90LV028ATMX Datasheet, PDF (2/18 Pages) Texas Instruments – DS90LV028A 3V LVDS Dual CMOS Differential Line Receiver
DS90LV028A
SNLS013E – JUNE 1998 – REVISED APRIL 2013
Functional Diagram
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Truth Table
INPUTS
[RIN+] − [RIN−]
VID ≥ 0.1V
VID ≤ −0.1V
Full Fail-safe OPEN/SHORT or Terminated
OUTPUT
ROUT
H
L
H
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
Absolute Maximum Ratings (1)
Supply Voltage (VCC)
Input Voltage (RIN+, RIN−)
Output Voltage (ROUT)
Maximum Package Power Dissipation @ +25°C
D Package
Derate D Package
NGN Package
Derate NGN Package
Storage Temperature Range
Lead Temperature Range Soldering
(4 sec.)
Maximum Junction Temperature
ESD Rating (2)
(HBM 1.5 kΩ, 100 pF)
(EIAJ 0Ω, 200 pF)
−0.3V to +4V
−0.3V to +3.9V
−0.3V to VCC + 0.3V
1025 mW
8.2 mW/°C above +25°C
3.3W
25.6 mW/°C above +25°C
−65°C to +150°C
+260°C
+150°C
≥ 7 kV
≥ 500 V
(1) “Absolute Maximum Ratings” are those values beyond which the safety of the device cannot be ensured. They are not meant to imply
that the devices should be operated at these limits. Electrical Characteristics specifies conditions of device operation.
(2) ESD Rating:
HBM (1.5 kΩ, 100 pF) ≥ 7 kV
EIAJ (0Ω, 200 pF) ≥ 500V
Recommended Operating Conditions
Supply Voltage (VCC)
Receiver Input Voltage
Operating Free Air
Temperature (TA)
Min
Typ
Max
+3.0
+3.3
+3.6
GND
3.0
−40
25
+85
Units
V
V
°C
2
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