DEM-PCM3500 Datasheet, PDF (2/4 Pages) Texas Instruments – EVALUATION BOARD

CONNECTORS
CN1 is the power supply connector for the DEM-PCM3500.
The +V_CC pin may be set between +2.7V and +3.6V. The
GND pin should be connected to the negative (–) or ground
terminal of the power supply or battery, and functions as the
analog ground connection.
CN2 is the host interface connector. It includes connections for
the serial interface and system clock input /output. The connec-
tor pins correspond directly to the pin names of the PCM3500.
Refer to the PCM3500 data sheet for more details regarding the
operation and requirements for these connections.
CN3 is the analog input connector. The V_IN pin is connected
to the PCM3500 analog-to-digital converter input, while the
GND pin is connected to analog ground. The full-scale input
voltage for V_IN is 0.6V_CC (in Vp-p), or 1.8Vp-p for a +3V
power supply.
CN4 is the analog output connector. The V_OUT pin is con-
nected to the PCM3500 digital-to-analog converter output,
while the GND pin is connected to analog ground. The full-
scale output voltage at V_OUT is typically 0.6V_CC (in Vp-p),
or 1.8Vp-p for a +3V power supply.
DIP SWITCH SETTINGS
Table I shows the function of each switch setting for SW1.
Each switch corresponds directly to a pin of the PCM3500.
Refer to the PCM3500 data sheet for more details regarding
the operation and requirements for these pin functions.
SW1
PWDN
LOOP
HPFD
T/S
M/S
DESCRIPTION
H = Power Down Disabled (normal operation)
L = Power Down Enabled
H = ADC-to-DAC Loop Back Enabled
L = ADC-to-DAC Loop Back Disabled
H = ADC High Pass Filter Disabled
L = ADC High Pass Filter Enabled
H = Time Slot Mode Enabled
L = Time Slot Mode Disabled
H = Master Mode Enabled
L = Slave Mode Enabled
TABLE I. DIP Switch Settings.
CRYSTAL OSCILLATOR OPERATION
The PCM3500 contains an internal crystal oscillator circuit.
The oscillator can be used to generate the 512f_S system clock
(512 times the desired sample frequency). The crystal value
must be equal to 512f_S. A fundamental mode, parallel
resonant crystal is recommended. The load capacitors, C_S,
should be set in the range from 10pF – 33pF, with 22pF
being the typical value. When using the crystal oscillator,
BCK and FS should be derived from SCKIO when using
Slave mode. Alternatively, the PCM3500 may be set to
Master mode so that the BCK and FS are generated by the
CODEC itself.
GND V_CC
CN1
VH2
SW1
DSS105
PWDN
LOOP
HPFD
DOUT
FSO
FS
DIN
BCK
SCKO
GND
XTI
CN2
VH8
SCKIO
XTI
FIGURE 1. Schematic.
®
DEM-PCM3500
+ _C9
100µF
C₁₀
0.1µF
C₂
2.2µF
+
C₆
0.1µF
C₃
U1
4.7µF
PCM3500
C₇
+
4.7µF
1
C₄
2 ^VCOM
24
V_{CC 23}
+
C₁
1µF
+
4.7µF
+
3 ^VREF1
4 ^VREF2
5 ^VIN
AGND
22
V_{OUT 21}
AGND
20
AGND
PDWN
6
19
M/S
LOOP
7
18
TSC
HPFD
8
17
BCK
XTI
9
16
FS
XTO
10
15
DIN
SCKIO
11
14
DOUT
DGND
12
13
FSO
V_DD
PDWN
LOOP
HPFD
SCKIO
C₅
0.1µF
+ C₈
4.7µF
2
CN3
VH2
V_IN
GND
C₁₁
1µF
+
CN4
VH2
V_OUT
GND
XTAL
XTI
C_S
C_S
OPTIONAL