CD74HC670 Datasheet, PDF (2/9 Pages) Texas Instruments – High-Speed CMOS Logic 4x4 Register File

Functional Diagram
CD74HC670, CD74HCT670
15
D0 ₁
D1 ₂
D2 ₃
D3 ₁₂
WE ₁₁
RE
RA1
RA0
WA0
WA1
4 5 14 13
10 _Q0
9 _Q1
7 _Q2
6
Q3
WRITE MODE SELECT TABLE
OPERATING
MODE
Write Data
INPUTS
WE
D_N
L
L
INTERNAL
LATCHES
(NOTE 3)
L
L
H
H
Data Latched
H
X
No Change
NOTE:
3. The Write Address (WA0 and WA1) to the “internal latches” must
be stable while WE is LOW for conventional operation.
READ MODE SELECT TABLE
INPUTS
OPERATING
MODE
RE
Read
L
INTERNAL
LATCHES
(NOTE 4)
L
OUTPUT
Q_N
L
L
H
H
Disabled
H
X
(Z)
NOTE:
4. The selection of the “internal latches” by Read Address (RA0 and
RA1) are not constrained by WE or RE operation.
H = High Voltage Level
L = Low Voltage Level
X= Don’t Care
Z = High Impedance “Off” State
2