CD74FCT273 Datasheet, PDF (2/7 Pages) Texas Instruments – BiCMOS FCT Interface Logic, Octal D Flip-Flop with Reset

Functional Diagram
CD74FCT273
CLOCK
CP
D0
D1
D2
D3
DATA INPUTS
D4
D5
D6
D7
RESET MR
11
3
4
7
8
13
14
17
18
2
Q0
5
Q1
6
Q2
9
Q3
12
Q4 DATA OUTPUTS
15
Q5
16
Q6
19
Q7
1
GND = PIN 10
V_CC = PIN 20
TRUTH TABLE (Note 1)
INPUTS
OUTPUTS
RESET MR
CLOCK CP
DATA Dn
Qn
L
X
X
L
H
↑
H
H
H
↑
L
L
H
L
X
Q0
NOTE:
1. H = HIGH Voltage Level (Steady State)
L = LOW Voltage Level (Steady State)
X = Irrelevant
↑ = Transition from low to high level.
Q0 = The level of Q before the indicated steady state input conditions were established.
IEC Logic Symbol
CD74FCT273
1
11
R
>C1
3
1D
2
4
5
7
6
8
9
13
12
14
15
17
16
18
19
2