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CD54HC597_08 Datasheet, PDF (2/18 Pages) Texas Instruments – High-Speed CMOS Logic 8-Bit Shift Register with Input Storage | |||
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CD54HC597, CD74HC597, CD74HCT597
Functional Diagram
DS
15
D0
1
D1
2
D2
PARALLEL
DATA
INPUTS
3
D3
4 8 F/F
D4 STORAGE
5 REG.
D5
6
D6
7
D7
12
STCP
11
SHCP 13
PL 10
MR
14
8-BIT
SHIFT
REG.
9
Q7
FUNCTION TABLE
STCP
SHCP
PL
â
X
X
MR
FUNCTION
X
Data Loaded to Input Flip-Flops
â
X
L
H
Data Loaded from Inputs to Shift Register
No Clock Edge
X
L
H
Data Transferred from Input Flip-Flops to Shift Register
X
X
L
L
Invalid Logic, State of Shift Register Indeterminate when
Signals Removed
X
X
H
L
Shift Register Cleared
X
â
H
H
Shift Register Clocked Qn = Qn-1, Q0 = DS
H = High Voltage Level, L = Low Voltage Level, X = Donât Care, â = Transition from Low to High CP Level
2
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