CD54HC597 Datasheet, PDF (2/14 Pages) Texas Instruments – High-Speed CMOS Logic 8-Bit Shift Register with Input Storage

CD54HC597, CD74HC597, CD74HCT597
Functional Diagram
DS
15
D0
1
D1
2
D2
PARALLEL
DATA
INPUTS
3
D3
4 ^{8 F/F}
D4 _STORAGE
5 ^REG.
D5
6
D6
7
D7
12
ST_CP
11
SH_{CP 13}
PL ₁₀
MR
14
8-BIT
SHIFT
REG.
9
Q7
FUNCTION TABLE
ST_CP
SH_CP
PL
↑
X
X
MR
FUNCTION
X
Data Loaded to Input Flip-Flops
↑
X
L
H
Data Loaded from Inputs to Shift Register
No Clock Edge
X
L
H
Data Transferred from Input Flip-Flops to Shift Register
X
X
L
L
Invalid Logic, State of Shift Register Indeterminate when
Signals Removed
X
X
H
L
Shift Register Cleared
X
↑
H
H
Shift Register Clocked Qn = Qn-1, Q0 = D_S
H = High Voltage Level, L = Low Voltage Level, X = Don’t Care, ↑ = Transition from Low to High CP Level
2