CD54HC165_07 Datasheet, PDF (2/15 Pages) Texas Instruments – High-Speed CMOS Logic 8-Bit Parallel-In/Serial-Out Shift Register

CD54HC165, CD74HC165, CD54HCT165, CD74HCT165
Functional Diagram
PARALLEL
DATA
INPUTS
11
D0
12
D1
13
D2
14
D3
3
D4
4
D5
5
D6
6
D7
DS ¹⁰
9
Q₇
7
Q₇
SERIAL
OUTPUTS
PL
CE
CP
1 15 2
GND = 8
VCC = 16
TRUTH TABLE
INPUTS
OPERATING MODE
PL
CE
CP
DS
D0 - D7
Parallel Load
L
X
X
X
L
L
X
X
X
H
Serial Shift
H
L
↑
l
X
H
L
↑
h
X
Hold Do Nothing
H
H
X
X
X
H =High Voltage Level
h = High Voltage Level One Set-up Time Prior To The Low-to-high Clock Transition
l = Low Voltage Level One Set-up Time Prior To The Low-to-high Clock Transition
L = Low Voltage Level
X = Don’t Care
↑ = Transition from Low to High Level
q_n = Lower Case Letters Indicate The State Of the Reference Output Clock Transition
Q_n REGISTER
Q₀
Q₁ - Q₆
L
L-L
H
H-H
L
q_{0 -} q₅
H
q_{0 -} q₅
q₀
q_{1 -} q₆
OUTPUTS
Q₇
Q₇
L
H
H
L
q₆
q₆
q₆
q₆
q₇
q₇
2