TPS51518_15 Datasheet, PDF (19/35 Pages) Texas Instruments – Single-Phase, D-CAP™ and D-CAP2™ Controller with 2-Bit Flexible VID Control

www.ti.com
TPS51518
SLUSAO8 – DECEMBER 2011
Thermal Shutdown
TPS51518 includes an internal temperature monitor. If the temperature exceeds the threshold value, 140°C (typ),
V_OUT is shut off. The state of V_OUT is open at thermal shutdown. This is a non-latch protection and the operation
is restarted with soft-start sequence when the device temperature is reduced by 10°C (typ).
Layout Considerations
Certain issues must be considered before designing a layout using the TPS51518.
0.1 µF
GSNS
VSNS
VREF
6
V3
5
V2
4
V1
3
V0
2
GSNS
1
VSNS
20
Controller
TPS51518
V5
15
DL
14
SLEW TRIP
19
18
10 nF
MODE
16
PwrPad GND
17
VIN
#1
2.2 µF
#2
#3
V_OUT
UDG-11261
Figure 26. DC/DC Converter Ground System
• V_IN capacitor(s), V_OUT capacitor(s) and MOSFETs are the power components and should be placed on one
side of the PCB (solder side). Other small signal components should be placed on another side (component
side). At least one inner plane should be inserted, connected to ground, in order to shield and isolate the
small signal traces from noisy power lines.
• All sensitive analog traces and components such as VSNS, SLEW, MODE, V0, V1, V2, V3, VREF and TRIP
should be placed away from high-voltage switching nodes such as SW, DH, DL or BST to avoid coupling.
Use internal layer(s) as ground plane(s) and shield feedback trace from power traces and components.
• The DC/DC converter has several high-current loops. The area of these loops should be minimized in order to
suppress generating switching noise.
– Loop #1. The most important loop to minimize the area of is the path from the V_IN capacitor(s) through the
high and low-side MOSFETs, and back to the capacitor(s) through ground. Connect the negative node of
the V_IN capacitor(s) and the source of the low-side MOSFET at ground as close as possible. (Refer to loop
#1 of Figure 26)
– Loop #2. The second important loop is the path from the low-side MOSFET through inductor and V_OUT
capacitor(s), and back to source of the low-side MOSFET through ground. Connect source of the low-side
MOSFET and negative node of V_OUT capacitor(s) at ground as close as possible. (Refer to loop #2 of
Figure 26)
– Loop #3. The third important loop is of gate driving system for the low-side MOSFET. To turn on the
low-side MOSFET, high current flows from V5 capacitor through gate driver and the low-side MOSFET,
and back to negative node of the capacitor through ground. To turn off the low-side MOSFET, high current
Copyright © 2011, Texas Instruments Incorporated
Product Folder Link(s) :TPS51518
Submit Documentation Feedback
19