TLV710_10 Datasheet, PDF (19/24 Pages) Texas Instruments – Dual, 200mA, Low-IQ Low-Dropout Regulator for Portable Devices

TLV710 Series
TLV711 Series
www.ti.com
DROPOUT VOLTAGE
The TLV710 and TLV711 use a PMOS pass
transistor to achieve low dropout. When (V_IN – V_OUT)
is less than the dropout voltage (V_DO), the PMOS
pass device is in the linear region of operation and
the input-to-output resistance is the R_DS(ON) of the
PMOS pass element. V_DO scales approximately with
the output current because the PMOS device
behaves as a resistor in dropout.
As with any linear regulator, PSRR and transient
response are degraded as (V_IN – V_OUT) approaches
dropout.
TRANSIENT RESPONSE
As with any regulator, increasing the size of the
output capacitor reduces over/undershoot magnitude
but increases duration of the transient response.
The TLV710 and TLV711 each have a dedicated
V_REF. Consequently, crosstalk from one channel to
the other as a result of transients is close to 0V.
UNDERVOLTAGE LOCKOUT (UVLO)
The TLV710 and TLV711 use an undervoltage
lockout circuit to keep the output shut off until the
internal circuitry is operating properly.
THERMAL INFORMATION
Thermal protection disables the output when the
junction temperature rises to approximately +165°C,
allowing the device to cool. When the junction
temperature cools to approximately +145°C, the
output circuitry is again enabled. Depending on power
dissipation, thermal resistance, and ambient
temperature, the thermal protection circuit may cycle
on and off. This cycling limits the dissipation of the
regulator, protecting it from damage as a result of
overheating.
Any tendency to activate the thermal protection circuit
indicates excessive power dissipation or an
inadequate heatsink. For reliable operation, junction
temperature should be limited to +125°C maximum.
To estimate the margin of safety in a complete design
(including heatsink), increase the ambient
temperature until the thermal protection is triggered;
SBVS142A – JULY 2010 – REVISED AUGUST 2010
use worst-case loads and signal conditions. For good
reliability, thermal protection should trigger at least
+35°C above the maximum expected ambient
condition of the particular application. This
configuration produces a worst-case junction
temperature of +125°C at the highest expected
ambient temperature and worst-case load.
The internal protection circuitry of the TLV710 and
TLV711 has been designed to protect against
overload conditions. It was not intended to replace
proper heatsinking. Continuously running the
TLV710/ TLV711 into thermal shutdown degrades
device reliability.
POWER DISSIPATION
The ability to remove heat from a die is different for
each package type, presenting different
considerations in the printed circuit board (PCB)
layout. The PCB area around the device that is free
of other components moves the heat from the device
to the ambient air.
Performance data for the TLV710 evaluation module
(EVM) are shown in Table 1. The EVM is a 2-layer
board with 2 ounces of copper per side. The
dimension and layout are shown in Figure 70 and
Figure 71. Using heavier copper increases the
effectiveness of removing heat from the device. The
addition of plated through-holes in the
heat-dissipating layer also improves the heatsink
effectiveness. Power dissipation depends on input
voltage and load conditions.
Power dissipation (P_D) is equal to the product of the
output current and the voltage drop across the output
pass element, as shown in Equation 2:
P_D = (V_IN – V_OUT) × I_OUT
(2)
PACKAGE MOUNTING
Solder pad footprint recommendations for the TLV710
and TLV711 are available from the Texas Instruments
Web site at www.ti.com. The recommended land
pattern for the DSE (SON-6) package is shown in
Figure 72.
PACKAGE
DSE
Table 1. TLV710 EVM Dissipation Ratings
R_qJA
170°C/W
T_A < +25°C
585mW
T_A = +70°C
320mW
T_A = +85°C
235mW
Copyright © 2010, Texas Instruments Incorporated
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