SRC4192IDBR Datasheet, PDF (19/34 Pages) Texas Instruments – 192kHz Stereo Asynchronous Sample Rate Converters

The bit clock is either an input or output at BCKI (pin 5). In
slave mode, BCKI is configured as an input pin, and may
operate at rates from 32f_S to 128f_S,with a minimum of one
clock cycle per data bit. In Master mode, BCKI operates at a
fixed rate of 64f_S.
The left/right word clock, LRCKI (pin 6), may be configured
as an input or output pin. In Slave mode, LRCKI is an input
pin, while in Master mode LRCKI is an output pin. In either
case, the clock rate is equal to f_S, the input sampling
frequency. The LRCKI duty cycle is fixed to 50% for Master
mode operation.
Table 2 illustrates data format selection for the input port. For
the SRC4192, the IFMT0 (pin 10), IFMT1 (pin 11), and
IFMT2 (pin 12) inputs are utilized to set the input port data
format. For the SRC4193, the IFMT[2:0] bits in Control
Register 3 are used to select the data format.
IFMT2 IFMT1 IFMT0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
INPUT PORT DATA FORMAT
24-Bit Left Justified
24-Bit I2S
Unused
Unused
16-Bit Right Justified
18-Bit Right Justified
20-Bit Right Justified
24-Bit Right Justified
TABLE 2. Input Port Data Format Selection.
OUTPUT PORT OPERATION
The audio output port is a four-wire synchronous serial
interface that may operate in either Slave or Master mode.
The SDOUT output (pin 23) is the serial audio data output.
Audio data is output at this pin in one of four data formats:
Philips I²S, Left Justified, Right Justified, or TDM. The audio
data word length may be 16-, 18-, 20-, or 24-bits. For all word
lengths, the data is triangular PDF dithered from the internal
28-bit data path. The data formats (with the exception of
TDM mode) are shown in Figure 6, while critical timing
parameters are shown in Figure 7 and listed in the Electrical
Characteristics table. The TDM format and timing are shown
in Figures 14 and 15, respectively, while examples of stan-
dard TDM configurations are shown in Figures 16 and 17.
LRCKO
BCKO
SDOUT
t_DOPD
t_SOH
t_SOL
t_DOH
FIGURE 7. Output Port Timing.
LRCKO
BCKO
SDOUT MSB
Left Channel
Right Channel
LSB
MSB
LSB
(a) Left Justified Data Format
LRCKO
BCKO
SDOUT
MSB
LSB
MSB
LSB
(b) Right Justified Data Format
LRCKO
BCKO
SDOUT
MSB
LSB
MSB
LSB
(c) I2S Data Format
1/f_S
FIGURE 6. Output Data Formats.
SRC4192, SRC4193
19
SBFS022B
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