PCM1870A Datasheet, PDF (19/46 Pages) Texas Instruments – 16-Bit Low-Power Stereo Audio ADC With Microphone Bias and Microphone Amplifier

PCM1870A
www.ti.com................................................................................................................................................................................................. SLAS617 – AUGUST 2008
THREE-WIRE INTERFACE (SPI, MODE (PIN 28) = LOW)
All write operations for the serial control port use 16-bit data words. Figure 17 shows the control data word
format. The most significant bit must be 0. There are seven bits, labeled IDX[6:0], that set the register address
for the write operation. The least-significant eight bits, D[7:0], contain the data to be written to the register
specified by IDX[6:0].
Figure 18 shows the functional timing diagram for writing to the serial control port. To write the data into the
mode register, the data is clocked into an internal shift register on the rising edge of the MC clock. The serial
data should change on the falling edge of the MC clock and should be LOW during write mode. The rising edge
of MS should be aligned with the falling edge of the last MC clock pulse in the 16-bit frame. The MC can run
continuously between transactions while MS is in the LOW state.
MSB
LSB
0 IDX6 IDX5 IDX4 IDX3 IDX2 IDX1 IDX0 D7 D6 D5 D4 D3 D2 D1 D0
Register Index (or Address)
Register Data
Figure 17. Control Data Word Format for MD
(1) Single Write Operation
MS
MC
MD
16 Bits
MSB
LSB
MSB
(2) Continuous Write Operation
MS
MC
MD
MSB
LSB MSB
8 Bits x N Frames
LSB MSB
LSB
MSB
R0001-01
LSB
Register Index
8 Bits
Register (N) Data Register (N+1) Data
N Frames
Figure 18. Register Write Operation
Register (N+2) Data
T0012-03
Copyright © 2008, Texas Instruments Incorporated
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