TLE2072 Datasheet, PDF (18/37 Pages) Texas Instruments – EXCALIBUR LOW-NOISE HIGH-SPEED JFET-INPUT DUAL OPERATIONAL AMPLIFIERS

TLE2072, TLE2072A, TLE2072Y
EXCALIBUR LOW-NOISE HIGH-SPEED
JFET-INPUT DUAL OPERATIONAL AMPLIFIERS
SLOS124A – JUNE 1993 – REVISED AUGUST 1994
electrical characteristics at V_CC± = ±15 V, T_A = 25°C
PARAMETER
TEST CONDITIONS
VIO
Input offset voltage
IIO
Input offset current
IIB
Input bias current
VIC = 0,
VIC = 0,
VO = 0, RS = 50 Ω
VO = 0, See Figure 4
VICR Common-mode input voltage range
RS = 50 Ω
VOM ₊ Maximum positive peak output voltage swing
VOM _–
Maximum negative peak
output voltage swing
AVD
Large-signal differential voltage amplification
ri
Input resistance
ci
Input capacitance
zo
Open-loop output impedance
CMRR Common-mode rejection ratio
kSVR
ICC
Supply-voltage rejection ratio (∆VCC_± /∆VIO)
Supply current (both channels)
IOS
Short-circuit output current
IO = – 200 µA
IO = – 2 mA
IO = – 20 mA
IO = 200 µA
IO = 2 mA
IO = 2 0 m A
VO = ± 10 V
VIC = 0
VIC = 0,
See Figure 5
RL = 600 Ω
RL = 2 kΩ
RL = 10 kΩ
Common mode
Differential
f = 1 MHz
VIC = VICRmin, VO = 0, RS = 50 Ω
VCC _± = ± 5 V to ±15 V,
RS = 50 Ω
VO = 0,
VO = 0,
No load
VO = 0
VID = 1 V
VID = – 1 V
TLE2072Y
MIN TYP MAX
1.1
6
6 100
20 175
15
15
to
to
– 11 11.9
13.8 14.1
13.5 13.9
11.5 12.3
– 13.8 – 14.2
– 13.5 – 14
– 11.5 – 12.4
80
96
90 109
95 118
1012
7.5
2.5
80
80
98
82
99
2.7 3.1 3.6
– 30 – 45
30
48
UNIT
mV
pA
pA
V
V
V
dB
Ω
pF
Ω
dB
dB
mA
mA
2 kΩ
VI
PARAMETER MEASUREMENT INFORMATION
2 kΩ
10 kΩ
VCC ₊
–
+
VO
VCC _–
RL _CL†
100 Ω
VI
VCC ₊
–
+
VCC _–
RL
VO
CL†
Figure 1. Slew-Rate Test Circuit
† _{Includes fixture capacitance}
Figure 2. Unity-Gain Bandwidth and
Phase-Margin Test Circuit
5–18
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