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THS5661A_15 Datasheet, PDF (18/34 Pages) Texas Instruments – DIGITAL-TO-ANALOG CONVERTER
THS5661A
12ĆBIT, 125 MSPS, CommsDAC
DIGITALĆTOĆANALOG CONVERTER
SLAS247B − NOVEMBER 1999 REVISED SEPTEMBER 2002
APPLICATION INFORMATION
DAC transfer function
The THS5661A delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the
approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the
binary input word has the decimal representation 4095. For mode 1, the MSB is inverted (twos complement input
format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,
straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:
IOUT1 + IOUTFS * IOUT2
where IOUTFS is the full-scale output current. The output currents can be expressed as:
IOUT1 + IOUTFS
CODE
4096
IOUT2 + IOUTFS
(4095 * CODE)
4096
where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive
resistor loads RLOAD or a transformer with equivalent input load resistance RLOAD. This would translate into
single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:
VOUT1 + IOUT1
RLOAD
+
CODE
4096
IOUTFS
RLOAD
VOUT2 + IOUT2
RLOAD
+
(4095–CODE)
4096
IOUTFS
RLOAD
The differential output voltage VOUTDIFF can thus be expressed as:
VOUTDIFF
+
VOUT1–VOUT2
+
(2CODE–4095)
4096
IOUTFS
RLOAD
The latter equation shows that applying the differential output will result in doubling of the signal power delivered
to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and
IOUT2, which would lead to increased signal distortion.
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