LP3852_15 Datasheet, PDF (18/32 Pages) Texas Instruments – 1.5-A Fast Response Ultra-Low Dropout Linear Regulators

LP3852, LP3855
SNVS174I – FEBRUARY 2003 – REVISED FEBRUARY 2015
12 Layout
www.ti.com
12.1 Layout Guidelines
Good PC layout practices must be used or instability can be induced because of ground loops and voltage drops.
The input and output capacitors must be directly connected to the IN, OUT, and ground pins of the regulator
using traces which do not have other currents flowing in them (Kelvin connect).
The best way to do this is to lay out C_IN and C_OUT near the device with short traces to the IN, OUT, and ground
pins. The regulator ground pin should be connected to the external circuit ground so that the regulator and its
capacitors have a "single point ground".
It should be noted that stability problems have been seen in applications where "vias" to an internal ground plane
were used at the ground points of the IC and the input and output capacitors. This was caused by varying ground
potentials at these nodes resulting from current flowing through the ground plane. Using a single point ground
technique for the regulator and its capacitors fixed the problem.
Since high current flows through the traces going into IN and coming from OUT, Kelvin connect the capacitor
leads to these pins so there is no voltage drop in series with the input and output capacitors.
12.2 Layout Example
SD
Pull-up
Resistor
IN
Input
Capacitor
ERROR
Pull-up
Resistor
OUT
Output
Capacitor
Ground
Figure 24. LP3852 TO-263 Package Typical Layout
SD
Pull-up
Resistor
IN
Input
Capacitor
SENSE
OUT
Output
Capacitor
Ground
Figure 25. LP3855 TO-263 Package Typical Layout
18
Submit Documentation Feedback
Copyright © 2003–2015, Texas Instruments Incorporated
Product Folder Links: LP3852 LP3855