ADS62C15_10 Datasheet, PDF (18/64 Pages) Texas Instruments – Dual Channel 11-Bits, 125 MSPS ADC With Parallel CMOS/DDR LVDS Outputs

ADS62C15
SLAS577D – JANUARY 2008 – REVISED JULY 2009....................................................................................................................................................... www.ti.com
SERIAL REGISTER MAP
Table 7. Summary of Functions Supported by Serial Interface ⁽¹⁾
REGISTER
ADDRESS
A7–A0 IN
HEX
00
10
11
12
13
14
16
17
18
19
1A
1B
1C
1D
1E to 2F
D7
D6
0
0
<CLKOUT
STRENGTH>
0
0
0
0
0
0
<OVRD>
Over-ride bit
0
0
0
0
0
0
0
<LOW
LATENCY>
<OFFSET
EN>
Other
0
correction
enable
0
0
REGISTER FUNCTIONS
D5
D4
D3
D2
D1
D0
0
0
0
0
<RST>
Software Reset
<SERIAL
READOUT
>
0
0
0
0
0
0
<CURRENT DOUBLE>
LVDS buffer current double
<LVDS CURRENT>
LVDS buffer current
programmability
<DATAOUT STRENGTH>
<LVDS TERMINATION>
Internal termination programmability
0
<OFFSET FREEZE>
0
0
0
0
<OUTPUT
INTERFACE>
LVDS or
CMOS
interface
<COARSE GAIN>
3.5 dB gain
<REF>
Internal/External
reference
<POWER DOWN MODES>
0
<DATA FORMAT>
2s complement or
straight binary
Bit/Byte wise
(LVDS only)
<TEST PATTERNS>
0
0
<FINE GAIN>
0 to 6 dB gain in 0.5 dB steps
<CUSTOM LOW> Lower 8 bits
0
0
0
<CUSTOM HIGH> Upper 6 bits
<OFFSET TC>
Offset correction time constant
<GAIN CORRECTION>
0 to 0.5 dB, steps of 0.05 dB
<FILTER
COEFF
SELECT>
In-built or
custom
coefficients
<DECIMATION Enable>
Enable decimation
<ODD TAP
Enable>
<DECIMATION RATE>
Decimate by 2, 4, 8
<SNRBoost Coeff1>
<SNRBoost Coeff2>
0
0
0
0
<DECIMATION FILTER
FREQ BANDS>
<FILTER COEFFICIENTS> 12 coefficients, each 12 bit signed
(1) Multiple functions in a register can be programmed in a single write operation.
18
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