ADS5481 Datasheet, PDF (18/54 Pages) Texas Instruments – 16-Bit, 80/105/135-MSPS Analog-to-Digital Converters

ADS5517
SLWS203 – DECEMBER 2007
A7 – A0 (hex)
D7
D6
<STBY>
63
GLOBAL
POWER
DOWN
Table 10. Serial Register B
D5
D4
D3
D2
<LOW SPEED>
ENABLE LOW
SAMPLING
FREQUENCY
OPERATION
<DF>
DATA
FORMAT
2's COMP or
STRAIGHT
BINARY
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D1
D0
D3
<DF> Output data format
0
2's complement
1
Straight binary
D4
<LOW SPEED> Low sampling frequency operation
0
Default SPEED mode for 50 < Fs ≤ 200 MSPS
1
Low SPEED mode 1≤ Fs ≤ 50 MSPS
D7
<STBY> Global power down
0
Normal operation
1
Global power down (includes ADC, internal references and output buffers)
A7 – A0 (hex)
65
Table 11. Serial Register C
D7
D6
D5
D4
D3
<TEST PATTERNS> — ALL 0S, ALL 1s,
TOGGLE, RAMP, CUSTOM PATTERN
D2
D1
D0
D7 — D5
000
001
010
011
100
101
111
<TEST PATTERN> Outputs selected test pattern on data lines
Normal operation
All 0s
All 1s
Toggle pattern – alternate 1s and 0s on each data output and across
data outputs
Ramp pattern – Output data ramps from 0x0000 to 0x3FFF by one
code every clock cycle
Custom pattern – Outputs the custom pattern in CUSTOM PATTERN
registers A and B
Unused
18
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