TPS75101Q Datasheet, PDF (17/35 Pages) Texas Instruments – FAST-TRANSIENT-RESPONSE 1.5-A LOW-DROPOUT VOLTAGE REGULATORS

TPS75101Q, TPS75115Q, TPS75118Q, TPS75125Q, TPS75133Q WITH POWER GOOD
TPS75301Q, TPS75315Q, TPS75318Q, TPS75325Q, TPS75333Q WITH RESET
FAST-TRANSIENT-RESPONSE 1.5-A LOW-DROPOUT VOLTAGE REGULATORS
SLVS241B – MARCH 2000 – REVISED JUNE 2003
APPLICATION INFORMATION
In most cases one can neglect the effect of inductive impedance ESL. Therefore, the following application
focuses mainly on the parasitic resistance ESR.
Figure 22 shows the output capacitor and its parasitic impedances in a typical LDO output stage.
I_O
LDO
+
V_ESR ^RESR
–
V_I
R_LOAD
V_O
C_O
Figure 22. LDO Output Stage With Parasitic Resistances ESR and ESL
In steady state (dc state condition), the load current is supplied by the LDO (solid arrow) and the voltage across
the capacitor is the same as the output voltage (V(C_O) = V_O). This means no current is flowing into the C_O
branch. If I_O suddenly increases (transient condition), the following occurs:
D The LDO is not able to supply the sudden current need due to its response time (t₁ in Figure 23). Therefore,
capacitor C_O provides the current for the new load condition (dashed arrow). C_O now acts like a battery with
an internal resistance, ESR. Depending on the current demand at the output, a voltage drop will occur at
R_ESR. This voltage is shown as V_ESR in Figure 22.
D When C_O is conducting current to the load, initial voltage at the load will be V_O = V(C_O) – V_ESR. Due to the
discharge of C_O, the output voltage V_O will drop continuously until the response time t₁ of the LDO is reached
and the LDO will resume supplying the load. From this point, the output voltage starts rising again until it
reaches the regulated voltage. This period is shown as t₂ in Figure 23.
Figure 23 also shows the impact of different ESRs on the output voltage. The left brackets show different levels
of ESRs where number 1 displays the lowest and number 3 displays the highest ESR.
From above, the following conclusions can be drawn:
D The higher the ESR, the larger the droop at the beginning of load transient.
D The smaller the output capacitor, the faster the discharge time and the bigger the voltage droop during the
LDO response period.
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