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TPS62120 Datasheet, PDF (17/33 Pages) Texas Instruments – 15V, 75mA High Efficient Buck Converter
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DETAILED DESCRIPTION
TPS62120
TPS62122
SLVSAD5 – JULY 2010
OPERATION
The TPS6212x synchronous step down converter family uses an unique hysteretic PFM/PWM controller scheme
which enables switching frequencies of up to 800kHz, excellent transient response and AC load regulation at
operation with small output capacitors.
At high load currents the converter operates in quasi fixed frequency PWM mode operation and at light loads in
PFM (Pulse Frequency Modulation) mode to maintain highest efficiency over the full load current range. In PFM
Mode, the device generates a single switch pulse to ramp the inductor current and charge the output capacitor,
followed by a sleep period where most of the internal circuits are shutdown to achieve a quiescent current of
typically 10µA. During this time, the load current is supported by the output capacitor. The duration of the sleep
period depends on the load current and the inductor peak current.
A significant advantage of TPS6212x compared to other hysteretic controller topologies is its excellent DC and
AC load regulation capability in combination with low output voltage ripple over the entire load range which
makes this part well suited for audio and RF applications.
Main Control Loop
The feedback comparator monitors the voltage on the FB pin and compares it to an internal 800mV reference
voltage.
The feedback comparator trips once the FB voltage falls below the reference voltage. A switching pulse is
initiated and the high-side MOSFET switch is turned on. It remains turned on at least for the minimum On Time
TONmin of typical 700ns until the feedback voltage is above the reference voltage or the inductor current reaches
the high-side MOSFET switch current limit ILIMF. Once the high-side MOSFET switch turns off, the low-side
MOSFET switch is turned on and the inductor current ramps down. It is turned on at least for the minimum Off
Time TOFFmin of typically 60ns. The low-side MOSFET switch stays turned on until the FB voltage falls below the
internal reference and trips the FB comparator again. This will turn on the high-side MOSFET switch for a new
switching cycle.
If the feedback voltage stays above the internal reference the low-side MOSFET switch is turned on until the
zero current comparator trips and indicates that the inductor current has ramped down to zero. In this case, the
load current is much lower than the average inductor current provided during one switching cycle. The regulator
turns the low-side and high-side MOSFET switches off (high impedance state) and enters a sleep cycle with
reduced quiescent current of typically 10uA until the output voltage falls below the internal reference voltage and
the feedback comparator trips again. This is called PFM Mode and the switching frequency depends on the load
current, input voltage, output voltage and the external inductor value.
Once the high-side switch current limit comparator has tripped its threshold of ILIMF, the high-side MOSFET
switch is turned off and the low-side MOSFET switch is turned on until the inductor current has ramped down to
zero.
The minimum On Time TONmin for a single pulse can be estimated to:
TON
=
VOUT
VIN
´ 1.3 μs
(1)
Therefore the peak inductor current in PFM mode is approximately:
( ) ILPFMpeak =
VIN - VOUT
L
´ TON
(2)
The transition from PFM mode to PWM mode operation and back occurs at a load current of approximately ½
ILPFMpeak.
With:
TON: high-side MOSFET switch on time [µs]
VIN: Input voltage [V]
VOUT: Output voltage [V]
L : Inductance [µH]
ILPFMpeak : PFM inductor peak current [mA]
Copyright © 2010, Texas Instruments Incorporated
Product Folder Link(s): TPS62120 TPS62122
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