THS5651A Datasheet, PDF (17/30 Pages) Texas Instruments – 10-BIT, 125 MSPS, CommsDACE DIGITAL-TO-ANALOG CONVERTER

THS5651A
10-BIT, 125 MSPS, CommsDAC™
DIGITAL-TO-ANALOG CONVERTER
SLAS260 – FEBRUARY 2000
APPLICATION INFORMATION
DAC transfer function
The THS5651A delivers complementary output currents IOUT1 and IOUT2. Output current IOUT1 equals the
approximate full-scale output current when all input bits are set high in mode 0 (straight binary input), i.e. the
binary input word has the decimal representation 1023. For mode 1, the MSB is inverted (twos complement input
format). Full-scale output current will flow through terminal IOUT2 when all input bits are set low (mode 0,
straight binary input). The relation between IOUT1 and IOUT2 can thus be expressed as:
+ * IOUT1 IOUT_FS IOUT2
where IOUT_FS is the full-scale output current. The output currents can be expressed as:
+ IOUT1
IOUT_FS
CODE
1024
+ ^{* (1023 CODE)}
IOUT2 IOUT_FS
1024
where CODE is the decimal representation of the DAC data input word. Output currents IOUT1 and IOUT2 drive
resistor loads R_LOAD or a transformer with equivalent input load resistance R_LOAD. This would translate into
single-ended voltages VOUT1 and VOUT2 at terminal IOUT1 and IOUT2, respectively, of:
+ + VOUT1
IOUT1
R_LOAD
CODE
1024
IOUT_FS
R_LOAD
+ + ^{(1023–CODE)}
VOUT2 IOUT2 R_LOAD
1024
IOUT_FS R_LOAD
The differential output voltage VOUT_DIFF can thus be expressed as:
+ + VOUT_DIFF
VOUT1–VOUT2
(2CODE–1023)
1024
IOUT_FS
R_LOAD
The latter equation shows that applying the differential output will result in doubling of the signal power delivered
to the load. Since the output currents of IOUT1 and IOUT2 are complementary, they become additive when
processed differentially. Care should be taken not to exceed the compliance voltages at node IOUT1 and
IOUT2, which would lead to increased signal distortion.
• POST OFFICE BOX 655303 DALLAS, TEXAS 75265
17