TAS5414CTPHDRQ1 Datasheet, PDF (17/39 Pages) Texas Instruments – FOUR-CHANNEL AUTOMOTIVE DIGITAL AMPLIFIERS

TAS5414C-Q1
TAS5424C-Q1
www.ti.com
SLOS795C – SEPTEMBER 2013 – REVISED JULY 2013
I²C fault register saves a record of the affected channels. If the supply or ground short is strong enough to
exceed the peak current threshold but not severe enough to trigger the OCSD, the peak current limiter
prevents excess current from damaging the output FETs, and operation returns to normal after the short is
removed.
3. DC Detect—This circuit detects a dc offset at the output of the amplifier continuously during normal
operation. If the dc offset reaches the level defined in the I²C registers for the specified time period, the
circuit triggers. By default, a dc detection event does not shut the output down. Disabling and enabling the
shutdown function is via I²C. If enabled, the triggered channel shuts down, but the others remain playing, but
with the FAULT pin asserted. The I²C registers define the dc level.
4. Clip Detect—The clip detect circuit alerts the user to the presence of a 100% duty-cycle PWM due to a
clipped waveform. When this occurs, a signal passed to the CLIP_OTW pin asserts it until the 100% duty-
cycle PWM signal is no longer present. All four channels connect to the same CLIP_OTW pin. Through I²C,
one can change the CLIP_OTW signal clip-only, OTW-only, or both. A fourth mode, used only during
diagnostics, is the option to report tweeter detection events on this pin (see the Tweeter Detection section).
The microcontroller in the system can monitor the signal at the CLIP_OTW pin, and may have a
configuration that reduces the volume to all four channels in an active clipping-prevention circuit.
5. Overtemperature Warning (OTW), Overtemperature Shutdown (OTSD) and Thermal Foldback—By
default, the CLIP_OTW pin setting indicates an OTW. One can make changes via I²C commands. If selected
to indicate a temperature warning, CLIP_OTW pin assertion occurs when the die temperature reaches
warning level 1 as shown in the electrical specifications. The OTW has three temperature thresholds with a
10°C hysteresis. I²C register 0x04 indicates each threshold in bits 5, 6, and 7. The device still functions until
the temperature reaches the OTSD threshold, at which time the outputs go into Hi-Z mode and the device
asserts the FAULT pin. I²C is still active in the event of an OTSD, and one can read the registers for faults,
but all audio ceases abruptly. After the OTSD resets, one can turn the device back on through I²C. The OTW
indication remains until the temperature drops below warning level 1. The thermal foldback decreases the
channel gain.
6. Undervoltage (UV) and Power-on-Reset (POR)—The undervoltage (UV) protection detects low voltages on
PVDD, AVDD, and CP. In the event of an undervoltage, the device asserts the FAULT pin and updates the
I²C registerd, depending on which voltage caused the event. Power-on reset (POR) occurs when PVDD
drops low enough. A POR event causes the I²C to go into a high-impedance state. After the device recovers
from the POR event, the device re-initialization occur via I²C.
7. Overvoltage (OV) and Load Dump—The OV protection detects high voltages on PVDD. If PVDD reaches
the overvoltage threshold, the device asserts the FAULT pin iand updates the I²C register. The device can
withstand 50-V load-dump voltage spikes.
Power Supply
A car battery that can have a large voltage range most commonly provides the power for the device. PVDD is a
filtered battery voltage, and it is the supply for the output FETS and the low-side FET gate driver. The supply for
the high-side FET gate driver comes from a charge pump (CP). The charge pump supplies the gate-drive voltage
for all four channels. AVDD, provided by an internal linear regulator powers the analog circuitry. This supply
requires 0.1-μF, 10-V external bypass capacitor at the A_BYP pin. TI recommends not connecting any external
components except the bypass capacitor to this pin. DVDD, which comes from an internal linear regulator,
powers the digital circuitry. The D_BYP pin requires a 0.1-μF, 10-V external bypass capacitor. TI recommends
not connecting any external components except the bypass capacitor to this pin.
The TAS5414C-Q1 and TAS5424C-Q1 can withstand fortuitous open-ground and -power conditions. Fortuitous
open ground usually occurs when a speaker wire shorts to ground, allowing for a second ground path through
the body diode in the output FETs. The diagnostic capability allows debugging of the speakers and speaker
wires, eliminating the need to remove the amplifier to diagnose the problem.
I²C Serial Communication Bus
The device communicates with the system processor via the I²C serial communication bus as an I²C slave-only
device. The processor can poll the device via I²C to determine the operating status. All reports of fault conditions
and detections are via I²C. There are also numerous features and operating conditions that one can set via I²C.
The I²C bus allows control of the following configurations:
• Independent gain control of each channel. The gain can be set to 12 dB, 20 dB, 26 dB, and 32 dB.
Copyright © 2013, Texas Instruments Incorporated
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Product Folder Links: TAS5414C-Q1 TAS5424C-Q1