LMZ23605 Datasheet, PDF (17/28 Pages) National Semiconductor (TI) – Evaluation Board to be an easy-to-use platform to evaluate

LMZ23605
www.ti.com
SNVS659E – MARCH 2011 – REVISED AUGUST 2012
One recommended output capacitor combination is a 220uF, 7 milliohm ESR specialty polymer cap in parallel
with a 100 uF 6.3V X5R ceramic. This combination provides excellent performance that may exceed the
requirements of certain applications. Additionally some small ceramic capacitors can be used for high frequency
EMI suppression.
C_IN SELECTION
The LMZ23605 module contains a small amount of internal ceramic input capacitors. Additional input
capacitance is required external to the module to handle the input ripple current of the application. The input
capacitor can be several capacitors in parallel. This input capacitance should be located in very close proximity
to the module. Input capacitor selection is generally directed to satisfy the input ripple current requirements rather
than by capacitance value. Input ripple current rating is dictated by the equation:
I(C_IN(RMS)) ≊ 1 /2 * I_O * SQRT (D / 1-D)
where
• D ≊ V_O / V_IN
• (As a point of reference, the worst case ripple current will occur when the module is presented with full load
current and when V_IN = 2 * V_O)
(10)
Recommended minimum input capacitance is 22uF X7R (or X5R) ceramic with a voltage rating at least 25%
higher than the maximum applied input voltage for the application. It is also recommended that attention be paid
to the voltage and temperature derating of the capacitor selected. It should be noted that ripple current rating of
ceramic capacitors may be missing from the capacitor data sheet and you may have to contact the capacitor
manufacturer for this parameter.
If the system design requires a certain minimum value of peak-to-peak input ripple voltage (ΔV_IN) be maintained
then the following equation may be used.
C_IN ≥ I_O * D * (1–D) / f_SW-CCM * ΔV_IN
(11)
If ΔV_IN is 1% of V_IN for a 12V input to 3.3V output application this equals 120 mV and f_SW = 812 kHz.
C_IN≥ 5A * 3.3V/12V * (1– 3.3V/12V) / (812000 * 0.12 V)
≥ 10.2μF
Additional bulk capacitance with higher ESR may be required to damp any resonant effects of the input
capacitance and parasitic inductance of the incoming supply lines. The LMZ23605 typical applications schematic
and evaluation board include a 150 μF 50V aluminum capacitor for this function. There are many situations
where this capacitor is not necessary.
POWER DISSIPATION AND BOARD THERMAL REQUIREMENTS
When calculating module dissipation use the maximum input voltage and the average output current for the
application. Many common operating conditions are provided in the characteristic curves such that less common
applications can be derived through interpolation. In all designs, the junction temperature must be kept below the
rated maximum of 125°C.
For the design case of V_IN = 24V, V_O = 3.3V, I_O = 5A, and T_AMB(MAX) = 85°C, the module must see a thermal
resistance from case to ambient of less than:
θ_CA< (T_J-MAX – T_A-MAX) / P_IC-LOSS - θ_JC
(12)
Given the typical thermal resistance from junction to case to be 1.9 °C/W. Use the 85°C power dissipation curves
in the TYPICAL PERFORMANCE CHARACTERISTICS section to estimate the P_IC-LOSS for the application being
designed. In this application it is 5.5W. (Note that for package dissipations above 5W air flow or external heat
sinking may be required.)
θ_CA = (125 – 85) / 5.5W – 1.9 = 5.37
(13)
To reach θ_CA = 5.37., the PCB is required to dissipate heat effectively. With no airflow and no external heat-sink,
a good estimate of the required board area covered by 2 oz. copper on both the top and bottom metal layers is:
Board_Area_cm² = 500°C x cm²/W / θ_CA
(14)
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