DAC7553 Datasheet, PDF (17/20 Pages) Texas Instruments – 12-BIT, DUAL, ULTRALOW GLITCH, VOLTAGE OUTPUT DIGITAL-TO-ANALOG CONVERTER

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INTEGRAL AND DIFFERENTIAL LINEARITY
The DAC7553 uses precision thin-film resistors pro-
viding exceptional linearity and monotonicity. Integral
linearity error is typically within (+/-) 0.35 LSBs, and
differential linearity error is typically within (+/-) 0.08
LSBs.
GLITCH ENERGY
The DAC7553 uses a proprietary architecture that
minimizes glitch energy. The code-to-code glitches
are so low, they are usually buried within the
wide-band noise and cannot be easily detected. The
DAC7553 glitch is typically well under 0.1 nV-s. Such
low glitch energy provides more than 10X improve-
ment over industry alternatives.
CHANNEL-TO-CHANNEL CROSSTALK
The DAC7553 architecture is designed to minimize
channel-to-channel crosstalk. The voltage change in
one channel does not affect the voltage output in
another channel. The DC crosstalk is in the order of a
few microvolts. AC crosstalk is also less than –100
dBs. This provides orders of magnitude improvement
over certain competing architectures.
APPLICATION INFORMATION
Waveform Generation
Due to its exceptional linearity, low glitch, and low
crosstalk, the DAC7553 is well suited for waveform
generation (from DC to 10 kHz). The DAC7553
large-signal settling time is 5 µs, supporting an
update rate of 200 KSPS. However, the update rates
can exceed 1 MSPS if the waveform to be generated
consists of small voltage steps between consecutive
DAC updates. To obtain a high dynamic range,
REF3140 (4.096 V) or REF02 (5 V) are rec-
ommended for reference voltage generation.
Generating ±5-V, ±10-V, and ± 12-V Outputs For
Precision Industrial Control
Industrial control applications can require multiple
feedback loops consisting of sensors, ADCs, MCUs,
DACs, and actuators. Loop accuracy and loop speed
are the two important parameters of such control
loops.
Loop Accuracy:
In a control loop, the ADC has to be accurate. Offset,
gain, and the integral linearity errors of the DAC are
not factors in determining the accuracy of the loop.
As long as a voltage exists in the transfer curve of a
monotonic DAC, the loop can find it and settle to it.
On the other hand, DAC resolution and differential
linearity do determine the loop accuracy, because
each DAC step determines the minimum incremental
DAC7553
SLAS477 – AUGUST 2005
change the loop can generate. A DNL error less than
–1 LSB (non-monotonicity) can create loop instability.
A DNL error greater than +1 LSB implies unnecess-
arily large voltage steps and missed voltage targets.
With high DNL errors, the loop loses its stability,
resolution, and accuracy. Offering 12-bit ensured
monotonicity and ± 0.08 LSB typical DNL error, 755X
DACs are great choices for precision control loops.
Loop Speed:
Many factors determine control loop speed. Typically,
the conversion time of the ADC and the computation
time of the MCU are the two major factors that
dominate the time constant of the loop. DAC settling
time is rarely a dominant factor because ADC conver-
sion times usually exceed DAC conversion times.
DAC offset, gain, and linearity errors can slow the
loop down only during the start-up. Once the loop
reaches its steady-state operation, these errors do
not affect loop speed any further. Depending on the
ringing characteristics of the loop's transfer function,
DAC glitches can also slow the loop down. With its 1
MSPS (small-signal) maximum data update rate,
DAC7553 can support high-speed control loops.
Ultralow glitch energy of the DAC7553 significantly
improves loop stability and loop settling time.
Generating Industrial Voltage Ranges:
For control loop applications, DAC gain and offset
errors are not important parameters. This could be
exploited to lower trim and calibration costs in a
high-voltage control circuit design. Using an oper-
ational amplifier (OPA130), and a voltage reference
(REF3140), the DAC7553 can generate the wide
voltage swings required by the control loop.
DAC7553
V_tail
REF3140
V_REF
V_REFH
DAC7553
R1
R2
_
V_{dac +}
OPA130
V_OUT
Figure 31. Low-cost, Wide-swing Voltage Gener-
ator for Control Loop Applications
The output voltage of the configuration is given by:
ǒ Ǔ _{Vout + VREF}
R2
R1
)
1
Din
4096
*
V_tail
R2
R1
(1)
Fixed R1 and R2 resistors can be used to coarsely
set the gain required in the first term of the equation.
Once R2 and R1 set the gain to include some
minimal over-range, a DAC7553 channel could be
used to set the required offset voltage. Residual
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