DAC102S085CIMMX Datasheet, PDF (17/28 Pages) Texas Instruments – DAC102S085 10-Bit Micro Power DUAL Digital-to-Analog Converter with Rail-to-Rail

DAC102S085
www.ti.com
SNAS364E – MAY 2006 – REVISED MARCH 2013
Input
Voltage
R
V_Z
I_Z
LM4050-4.1
or
LM4050-5.0
I_DAC
0.47 PF
0.1 PF
V_A V_REFIN
DAC102S085
SYNC
V_OUT = 0V to 5V
DIN
SCLK
Figure 34. The LM4050 as a power supply
The minimum resistor value in the circuit of Figure 34 must be chosen such that the maximum current through
the LM4050 does not exceed its 15 mA rating. The conditions for maximum current include the input voltage at
its maximum, the LM4050 voltage at its minimum, and the DAC102S085 drawing zero current. The maximum
resistor value must allow the LM4050 to draw more than its minimum current for regulation plus the maximum
DAC102S085 current in full operation. The conditions for minimum current include the input voltage at its
minimum, the LM4050 voltage at its maximum, the resistor value at its maximum due to tolerance, and the
DAC102S085 draws its maximum current. These conditions can be summarized as
R(min) = ( V_IN(max) − V_Z(min) ) /I_Z(max)
(3)
and
R(max) = ( V_IN(min) − V_Z(max) ) / ( (I_DAC(max) + I_Z(min) )
where
• V_Z(min) and V_Z(max) are the nominal LM4050 output voltages ± the LM4050 output tolerance over
temperature
• I_Z(max) is the maximum allowable current through the LM4050
• I_Z(min) is the minimum current required by the LM4050 for proper regulation
• I_DAC(max) is the maximum DAC102S085 supply current
(4)
LP3985
The LP3985 is a low noise, ultra low dropout voltage regulator with a 3% accuracy over temperature. It is a good
choice for applications that do not require a precision reference for the DAC102S085. It comes in 3.0V, 3.3V and
5V versions, among others, and sports a low 30 µV noise specification at low frequencies. Since low frequency
noise is relatively difficult to filter, this specification could be important for some applications. The LP3985 comes
in a space-saving 5-pin SOT-23 and 5-bump DSBGA packages.
Input
Voltage
1 PF
LP3985
0.01 PF
0.1 PF
0.1 PF
V_A V_REFIN
DAC102S085
SYNC
V_OUT = 0V to 5V
DIN
SCLK
Figure 35. Using the LP3985 regulator
An input capacitance of 1.0µF without any ESR requirement is required at the LP3985 input, while a 1.0µF
ceramic capacitor with an ESR requirement of 5mΩ to 500mΩ is required at the output. Careful interpretation
and understanding of the capacitor specification is required to ensure correct device operation.
Copyright © 2006–2013, Texas Instruments Incorporated
Product Folder Links: DAC102S085
Submit Documentation Feedback
17