UCD9224 Datasheet, PDF (16/34 Pages) Texas Instruments – Digital PWM System Controller

UCD9224
SLVSA35 – JANUARY 2010
VOUT_MARGIN_HIGH
VOUT_COMMAND
VOUT_MARGIN_LOW
OPERATION
Command
VOUT_MAX
3:1
Mux
+
Limiter
VOUT_
SCALE_
LOOP
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Vref DAC
VOUT_CAL_OFFSET
Figure 8. PMBus Voltage Adjustment Methods
For a complete description of the commands supported by the UCD9224 see the UCD92xx PMBUS Command
Reference (SLUU337). Each of these commands can also be issued from the Texas Instruments Fusion Digital
Power™ Designer program. This Graphical User Interface (GUI) PC program issues the appropriate commands
to configure the UCD9224 device.
Calibration
To optimize the operation of the UCD9224, PMBus commands are supplied to enable fine calibration of output
voltage, output current, and temperature measurements. The supported commands and related calibration
formulas may be found in the UCD92xx PMBUS Command Reference (SLUU337).
Analog Front End (AFE)
VEAP
VEAN
PMBus
V_EA ^{GAFE = 1, 2, 4, or 8}
Vead
6-bit
result
EADC
GeADC = 8 mV/LSB
Vref DAC
Vref = 1.563 mV/LSB
CPU
Figure 9. Analog Front End Block Diagram
The UCD9224 senses the power supply output voltage differentially through the EAP and EAN pins. The error
amplifier utilizes a switched capacitor topology that provides a wide common mode range for the output voltage
sense signals. The fully differential nature of the error amplifier also ensures low offset performance.
The output voltage is sampled at a programmable time (set by the EADC_SAMPLE_TRIGGER PMBus
command). When the differential input voltage is sampled, the voltage is captured in internal capacitors and then
transferred to the error amplifier where the value is subtracted from the set-point reference which is generated by
the 10-bit Vref DAC as shown in Figure 9. The resulting error voltage is then amplified by a programmable gain
circuit before the error voltage is converted to a digital value by the error ADC. This programmable gain is
configured through the PMBus and affects the dynamic range and resolution of the sensed error voltage as
shown in Table 3.
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