TPS62040_15 Datasheet, PDF (16/30 Pages) Texas Instruments – 1.2 A/1.25 MHz, HIGH-EFFICIENCY STEP-DOWN CONVERTER

TPS62040
TPS62042, TPS62043
TPS62044, TPS62046
SLVS463B − JUNE 2003 − REVISED OCTOBER 2005
www.ti.com
Layout Considerations
For all switching power supplies, the layout is an important step in the design especially at high peak currents and
switching frequencies. If the layout is not carefully done, the regulator might show stability problems as well as EMI
problems. Therefore, use wide and short traces for the main current paths as indicated in bold in Figure 16. These
traces should be routed first. The input capacitor should be placed as close as possible to the IC pins as well as the
inductor and output capacitor. The feedback resistor network should be routed away from the inductor and switch
node to minimize noise and magnetic interference. To further minimize noise from coupling into the feedback network
and feedback pin, the ground plane or ground traces should be used for shielding. A common ground plane or a star
ground as shown below should be used. This becomes very important especially at high switching frequencies of
1.25 MHz.
V_I
C3
22 µF
The Switch Node Must Be
Kept as Small as Possible
TPS6204x
2
VIN
8
SW
3
1
6
VIN
EN
MODE
SW ⁷
FB ⁵
PGND ¹⁰
4 _{GND PGND} 9
L1
10 µH
V_O
C2
22 µF
Figure 16. Layout Diagram
THERMAL INFORMATION
One of the most influential components on the thermal performance of a package is board design. In order to take
full advantage of the heat dissipating abilities of the PowerPADt packages, a board should be used that acts similar
to a heat sink and allows for the use of the exposed (and solderable), deep downset pad. For further information
please refer to Texas Instruments application note (SLMA002) PowerPAD Thermally Enhanced Package.
The PowerPADt of the 10-pin MSOP package has an area of 1,52 mm × 1,79 mm (± 0,05 mm) and must be soldered
to the PCB to lower the thermal resistance. Thermal vias to the next layer further reduce the thermal resistance.
16