TPS54418_10 Datasheet, PDF (16/34 Pages) Texas Instruments – 2.95 V to 6 V Input, 4 A Output, 2MHz, Synchronous Step Down Switcher With Integrated FETs ( SWIFT™)

TPS54418
SLVS946A – MAY 2009 – REVISED MAY 2010
c
C2
COMP
R3
C1
Power Stage
13.0 A/V
PH
VO
a
b
R1
R_ESR
R_L
CO RO
0.8 V
gm
225 uA/V
VSENSE
R2
C_OUT
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Figure 30. Small Signal Model for Loop Response
SIMPLE SMALL SIGNAL MODEL FOR PEAK CURRENT MODE CONTROL
Figure 30 is a simple small signal model that can be used to understand how to design the frequency
compensation. The TPS54418 power stage can be approximated to a voltage controlled current source (duty
cycle modulator) supplying current to the output capacitor and load resistor. The control to output transfer
function is shown in Equation 7 and consists of a dc gain, one dominant pole and one ESR zero. The quotient of
the change in switch current and the change in COMP pin voltage (node c in Figure 30) is the power stage
transconductance. The gm for the TPS54418 is 13.0 A/V. The low frequency gain of the power stage frequency
response is the product of the transconductance and the load resistance as shown in Equation 8. As the load
current increases and decreases, the low frequency gain decreases and increases, respectively. This variation
with load may seem problematic at first glance, but the dominant pole moves with load current [see Equation 9].
The combined effect is highlighted by the dashed line in the right half of Figure 31. As the load current
decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same
for the varying load conditions which makes it easier to design the frequency compensation.
VO
VC
R_ESR
gm_ps
Adc
fp
RL
C_OUT
fz
Figure 31. Simple Small Signal Model and Frequency Response for Peak Current Mode Control
vo
vc
= Adc ´
æ
ç¹⁺
è
2p
s
×
¦z
ö
÷
ø
æ
ç¹⁺
è
2p
s
×
ö
¦p
÷
ø
(7)
Adc = gm_ps ´ R_L
(8)
16
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