TLC5941 Datasheet, PDF (16/23 Pages) Texas Instruments – 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND GRAYSCALE PWM CONTROL

TLC5941
SLVS589 – JULY 2005
www.ti.com
GRAYSCALE PWM OPERATION
The grayscale PWM cycle starts with the falling edge of BLANK. The first GSCLK pulse after BLANK increases
the grayscale counter by one and switches on all OUTn with grayscale value not zero. Each following rising edge
of GSCLK increases the grayscale counter by one. The TLC5941 compares the grayscale value of each output
OUTn with the grayscale counter value. All OUTn with grayscale values equal to counter values are switched off.
A BLANK=H signal after 4096 GSCLK pulses resets the grayscale counter to zero and completes the grayscale
PWM cycle (see Figure 12).
BLANK
GS PWM
Cycle n
GS PWM
Cycle n+1
GSCLK
OUT0
(Current)
OUT1
(Current)
t_pd1
t_pd1 + t_d
t_wh1
t_wl1
1
2
t_wl1
t_pd4
3
t_pd3
nxt_d
t_h4
4096
t_wh3
t_pd3+ n x t_d
t_su4
1
t_pd1 + 15 x t_d
OUT15
(Current)
t_pd3
XERR
Figure 12. Grayscale PWM Cycle Timing Chart
SERIAL DATA TRANSFER RATE
Figure 13 shows a cascading connection of n TLC5941 devices connected to a controller, building a basic
module of an LED display system. The maximum number of cascading TLC5941 devices depends on the
application system and is in the range of 40 devices. Equation 5 calculates the minimum frequency needed:
f(GSCLK) + 4096 f(update)
f(SCLK) + 193 f(update) n
(5)
where:
f_(GSCLK): minimum frequency needed for GSCLK
f_(SCLK): minimum frequency needed for SCLK and SIN
f_(update): update rate of whole cascading system
n: number cascaded of TLC5941 device
16