TIBPAL16R6-15C Datasheet, PDF (16/19 Pages) Texas Instruments – HIGH-PERFORMANCE IMPACT PAL CIRCUITS

TIBPAL 16L8-20M, TIBPAL 16R4-20M, TIBPAL 16R6-20M, TIBPAL 16R8-20M
HIGH-PERFORMANCE IMPACT ™ PAL® CIRCUITS
SRPS019A – FEBRUARY 1984 – REVISED APRIL 2000
PARAMETER MEASUREMENT INFORMATION
5V
From Output
Under Test
CL
(see Note A)
S1
R1
Test
Point
R2
LOAD CIRCUIT FOR 3-STATE OUTPUTS
Timing
Input
tsu
Data
Input
3V
1.5 V
0
1.5 V
th
3V
1.5 V
0
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
High-Level
Pulse
1.5 V
tw
3V
1.5 V
0
Low-Level
Pulse
1.5 V
3V
1.5 V
0
VOLTAGE WAVEFORMS
PULSE DURATIONS
Input
tpd
In-Phase
Output
tpd
Out-of-Phase
Output
(see Note D)
1.5 V
1.5 V
1.5 V
3V
1.5 V
0
tpd
VOH
1.5 V
VOL
tpd
VOH
1.5 V
VOL
Output
Control
(low-level
enabling)
ten
Waveform 1
S1 Closed
(see Note B)
ten
Waveform 2
S1 Open
(see Note B)
1.5 V
tdis
1.5 V
tdis
1.5 V
1.5 V
3V
0
≈3.3 V
VOL + 0.5 V
VOL
VOH
VOH – 0.5 V
≈0 V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES, 3-STATE OUTPUTS
NOTES: A. CL includes probe and jig capacitance and is 50 pF for tpd and ten, 5 pF for tdis.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform
2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses have the following characteristics: PRR ≤ 10 MHz, tr = tf ≤ 2 ns, duty cycle = 50%
D. When measuring propagation delay times of 3-state outputs, switch S1 is closed.
E. Equivalent loads may be used for testing.
Figure 4. Load Circuit and Voltage Waveforms
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