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THS4221D Datasheet, PDF (16/40 Pages) Texas Instruments – LOW-DISTORTION, HIGH-SPEED, RAIL-TO-RAIL OUTPUT OPERATIONAL AMPLIFIERS
THS4221, THS4225
THS4222, THS4226
SLOS399G − AUGUST 2002 − REVISED JANUARY 2004
Power-Down Reference Pin Operation
In addition to the power-down pin, the THS4225 features
a reference pin (REF) which allows the user to control the
enable or disable power-down voltage levels applied to the
PD pin. Operation of the reference pin as it relates to the
power-down pin is described below.
In most split-supply applications, the reference pin is
connected to ground. In some cases, the user may want
to connect it to the negative or positive supply rail. In either
case, the user needs to be aware of the voltage level
thresholds that apply to the power-down pin. The tables
below show examples and illustrate the relationship
between the reference voltage and the power-down
thresholds.
POWER-DOWN THRESHOLD VOLTAGE LEVELS (REF ≤ Midrail)
SUPPLY
VOLTAGE
(V)
REFERENCE PIN
VOLTAGE (V)
ENABLE DISABLE
LEVEL (V) LEVEL (V)
GND
≥ 1.8
≤1
±5
−2.5
≥ −0.7
≤ −1.5
−5
≥ −3.2
≤ −4
GND
≥ 1.8
≤1
5
1
≥ 2.8
≤2
2.5
≥ 4.3
≤ 3.5
3.3
GND
≥ 1.8
≤1
In the above table, the threshold levels are derived by the
following equations:
REF + 1.8 V for enable
REF + 1 V for disable
Note that in order to maintain these threshold levels, the
reference pin can be any voltage between Vs− or GND up
to Vs/2 (mid rail).
For 3.3-V operation, the reference pin must be connected
to the most negative rail (for single supply this is GND).
POWER-DOWN THRESHOLD VOLTAGE LEVELS (REF > Midrail)
SUPPLY
VOLTAGE
(V)
REFERENCE PIN
VOLTAGE (V)
ENABLE DISABLE
LEVEL (V) LEVEL (V)
Floating or 5
≥4
≤ 3.5
±5
2.5
≥ 1.5
≤1
1
≥0
≤ −0.5
Floating or 5
≥4
≤ 3.5
5
4
≥3
≤ 2.5
3.5
≥ 2.5
≤2
3.3
Floating or 3.3
≥ 2.7
≤ 1.8
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In the above table, the threshold levels are derived by the
following equations:
REF − 1 V for enable
REF − 1.5 V for disable
Note that in order to maintain these threshold levels, the
reference pin can be any voltage between (Vs+/2) + 1 V to
Vs+ or left floating. The reference pin is internally
connected to the positive rail, therefore it can be left
floating to maintain these threshold levels.
For 3.3-V operation, the reference pin must be connected
to the positive rail or left floating.
The recommended mode of operation is to tie the
reference pin to midrail, thus setting the threshold levels to
midrail +1.0 V and midrail +1.8 V.
NO. OF CHANNELS PACKAGES
Single (8-pin)
THS4225D, THS4225DGN
Power Supply Decoupling Techniques and
Recommendations
Power supply decoupling is a critical aspect of any
high-performance amplifier design process. Careful
decoupling provides higher quality ac performance (most
notably improved distortion performance). The following
guidelines ensure the highest level of performance.
1. Place decoupling capacitors as close to the power
supply inputs as possible, with the goal of minimizing
the inductance of the path from ground to the power
supply.
2. Placement priority should put the smallest valued
capacitors closest to the device.
3. Use of solid power and ground planes is
recommended to reduce the inductance along power
supply return current paths, with the exception of the
areas underneath the input and output pins.
4. Recommended values for power supply decoupling
include a bulk decoupling capacitor (6.8 to 22 µF), a
mid-range decoupling capacitor (0.1 µF) and a high
frequency decoupling capacitor (1000 pF) for each
supply. A 100 pF capacitor can be used across the
supplies as well for extremely high frequency return
currents, but often is not required.
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