TAS5342L Datasheet, PDF (16/29 Pages) Texas Instruments – 100 W STEREO DIGITAL AMPLIFIER POWER STAGE

TAS5342L
SLAS558 – OCTOBER 2007
www.ti.com
APPLICATION INFORMATION
PCB Material Recommendation
FR-4 Glass Epoxy material with 2 oz. (70 μm) is recommended for use with the TAS5342L. The use of this
material can provide for higher power output, improved thermal performance, and better EMI margin (due to
lower PCB trace inductance.
PVDD Capacitor Recommendation
The large capacitors used in conjunction with each full-birdge, are referred to as the PVDD Capacitors. These
capacitors should be selected for proper voltage margin and adequate capacitance to support the power
requirements. In practice, with a well designed system power supply, 1000 μF, 50-V will support more
applications. The PVDD capacitors should be low ESR type because they are used in a circuit associtated with
high-speed switching.
Decoupling Capacitor Recommendations
In order to design an amplifier that has robust performance, passes regulatory requirements, and exhibits good
audio performance, good quality decoupling capacitors should be used. In practice, X7R should be used in this
application.
The voltage of the decoupling capactors should be selected in accordance with good design practices.
Temperature, ripple current, and voltage overshoot must be considered. This fact is particularly true in the
selection of the 0.1μF that is placed on the power supply to each half-bridge. It must withstand the voltage
overshoot of the PWM switching, the heat generated by the amplifier during high power output, and the ripple
current created by high power power output. A minimum voltage rating of 50-V is required for use with a 32.0 V
power supply.
System Design Recommendations
The following schematics and PCB layouts illustrate "best practices" in the use of the TAS5342L.
Microcontroller
I2C
PWM1_P
VALID
PWM1_M
PWM2_P
PWM2_M
TAS5508/18
VDD (+12 V)
10 W
10 W
100 nF
GND
GND
27 k
GND
100 nF
0W
GND
100 nF
100 nF
TAS5342LDDV
1
GVDD_B
2
3 ^OTW
NC
4
NC
5
SD
6
PWM_A
7
8 ^RESET_AB
PWM_B
9
10 ^OC_ADJ
GND
11
AGND
12
VREG
13
M3
14
15 ^M2
M1
16
PWM_C
17
RESET_CD
18
PWM_D
19
20 ^NC
NC
21
VDD
22
GVDD_C
44
GND
GVDD_A
43
BST_A ₄₂
NC
33 nF
25 V
41
GND
PVDD_A
40
PVDD_A
39
OUT_A
38
GND_A
37
GND_B
GND
36
OUT_B ₃₅
PVDD_B _{34 33 nF 25 V}
BST_B
33
BST_C
PVDD_C ^{32 33 nF 25V}
31
OUT_C
30
GND_C
GND
29
GND_D
28
OUT_D ₂₇
PVDD_D
26
PVDD_D
25
NC
GND
24
BST_D
23
GVDD_D
33 nF 25 V
GND
100 nF
10 W
GND
10 W
100 nF
GND
100 nF
50 V
100 nF
50 V
10 µH
470 nF
100 nF
50 V
10 µH
470 µF
50 V
3.3 W
10 nF
50 V
GND
1 nF
50 V
100 nF
50 V
GVDD (+12 V)
PVDD
3.3 W
10 nF
50 V
GND _{1 nF}
50 V
GND
10 nF
50 V
3.3 W
100 nF
50 V
100 nF
50 V
10 µH
470 nF
100 nF
50 V
100 nF
50 V
10 µH
1 nF
50 V
GND 1 nF
50 V
3.3 W
10 nF
50 V
GND
10 nF
50 V
3.3 W
470 µF
50 V
3.3 W
10 nF
50 V
PVDD
GND
GVDD (+12 V)
Figure 14. Typical Differential (2N) BTL Application With AD Modulation Filters
16
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