DAC6571 Datasheet, PDF (16/22 Pages) Texas Instruments – +2.7 V to +5.5 V, I2C INTERFACE, VOLTAGE OUTPUT, 10-BIT DIGITAL-TO-ANALOG CONVERTER

DAC6571
SLAS406 – DECEMBER 2003
THEORY OF OPERATION (continued)
SDA
SCL
Data Line
Stable;
Data Valid
Change of Data Allowed
Figure 42. Bit Transfer on the I²C Bus
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Data Output
by Transmitter
Data Output
by Receiver
SCL From
Master
S
START
Condition
Not Acknowledge
Acknowledge
1
2
8
Figure 43. Acknowledge on the I²C Bus
9
Clock Pulse for
Acknowledgement
Recognize START or
REPEATED START
Condition
SDA
MSB
Address
Generate ACKNOWLEDGE
Signal
Acknowledgement
Signal From Slave
Recognize STOP or
REPEATED START
Condition
P
Sr
SCL
S
or
Sr
1
2
START or
Repeated START
Condition
R/W
7
8
9
ACK
1
2
Clock Line Held Low While
Interrupts are Serviced
Figure 44. Bus Protocol
3-8
9
Sr
ACK
or
P
STOP or
Repeated START
Condition
16