TS5A12301E Datasheet, PDF (15/22 Pages) Texas Instruments – IEC LEVEL 4 ESD-PROTECTED 0.75-Ω SPDT ANALOG SWITCH WITH 1.8-V COMPATIBLE INPUT LOGIC

TS5A12301E
www.ti.com ................................................................................................................................................................................................ SCES707 – AUGUST 2008
PARAMETER MEASUREMENT INFORMATION (continued)
V+
V_NC or V_NO
Logic
V+
Input
50%
NC or NO
V_COM
(V_I)
0
COM
NC or NO
IN
V_I
C_L(2)
Switch
R_L
Output
(V_COM)
90% 90%
t_BBM
Logic
Input⁽¹⁾
GND
V_NC or V_NO = V+/2
R_L = 50 Ω
C_L = 35 pF
A. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, Z_O = 50 Ω, t_r < 5 ns, t_f
< 5 ns.
B. C_L includes probe and jig capacitance.
Figure 19. Break-Before-Make Time (t_BBM)
Network Analyzer
50
Source
Signal
50
V_{NO NO}
V_I
IN
+
V₊
COM
V_COM
GND
Channel ON: NO to COM
V_I = V_IH or V_IL
Network Analyzer Setup
Source Power = 0 dBm
(632-mV P-P at 50-Ωload)
DC Bias = 350 mV
Figure 20. Bandwidth (BW)
Copyright © 2008, Texas Instruments Incorporated
Product Folder Link(s): TS5A12301E
Submit Documentation Feedback
15