TRF3710 Datasheet, PDF (15/30 Pages) Texas Instruments – IQ DEMODULATOR

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TRF3710
SLWS199 – AUGUST 2007
Register 1
Register Address
Auto
Cal
Enable
Autocal
Bit0
Bit1
Bit2
Bit3
Bit4 Bit5
Bit6
DAC Bits To Be Set During Manual Cal I/Q
Bit7
Bit8
Bit9
Bit10
Bit11 Bit12
Bit13
Bit14
Bit15
Bit16
DAC Bits CONT
Bit17 Bit18
Bit19
DC Offset Digital
Cal. Resolution
for I Channel
Bit20 Bit21
DC Offset Digital
Cal. Resolution
for Q Channel
Bit22 Bit23
Bin
Search
Bit24
Division Ratio for Clock
Divider
Bit25 Bit26 Bit27
Cal Clk Internal Osc Freq Trimming
Select
Bit28 Bit29 Bit30 Bit31
Figure 32. Register 1 MapFigure
REGISTER 1
NAME
Bit0
Bit1
Bit2
Bit3
Bit4
Bit5
Bit6
Bit7
Bit8
Bit9
Bit10
Bit11
Bit12
Bit13
Bit14
Bit15
Bit16
Bit17
Bit18
Bit19
Bit20
Bit21
Bit22
Bit23
Bit24
Bit25
Bit26
Bit27
Bit28
Bit29
Bit30
Bit31
ADDR_0
ADDR_1
AUTO_CAL
EN_AUTOCAL
IDAC_BIT0
IDAC_BIT1
IDAC_BIT2
IDAC_BIT3
IDAC_BIT4
IDAC_BIT5
IDAC_BIT6
IDAC_BIT7
QDAC_BIT0
QDAC_BIT1
QDAC_BIT2
QDAC_BIT3
QDAC_BIT4
QDAC_BIT5
QDAC_BIT6
QDAC_BIT7
IDET_B0
IDET_B1
QDET_B0
QDET_B1
Bin Search
CLK_DIV_RATIO<0>
CLK_DIV_RATIO<1>
CLK_DIV_RATIO<2>
CAL_CLK_SEL
OSC_TRIM<0>
OSC_TRIM<1>
OSC_TRIM<2>
Table 2. Register 1: Device Setup
RESET
VALUE
WORKING DESCRIPTION
1
Address bits
0
1 Auto dc offset correction when = 1, otherwise manual
0 Auto cal begins when bit= 1, is reset after completion of cal
0
0
0
0
0
0
0
1
DAC bits to be set during manual cal I/Q
0
0
0
0
0
0
0
1
1
Set the dc offset digital calibration resolution for I channel.
1
1
Set the dc offset digital calibration resolution for Q channel.
1
1 Set to 1 for Auto-Calibration; Set to 0 for Manual control.
0
0
DC offset auto-calibration clock divider:
division ratios = 1, 8, 16, 128, 256, 1024, 2048, 16684
0
1 Select internal oscillator when 1, SPI clk when 0
1
Internal Oscillator frequency trimming
1 000 => 300 kHz
0
111 => 1.8 MHz
Copyright © 2007, Texas Instruments Incorporated
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