TPS65320QPWPRQ1 Datasheet, PDF (15/34 Pages) Texas Instruments – 40-V Step-Down Converter With Eco-mode™ Codec and LDO Regulator

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TPS65320-Q1
SLVSAY9A – DECEMBER 2012 – REVISED APRIL 2013
c
R3
C2
C1
Power Stage
gmps = 10.5 S
SW
VO
a
x
b
COMP
x
Co
Ro
R1
+
Error
Amp
FB1
x
R2
±
Vref = 0.8V
gmea
310 S
Resr
RL
Cout
Inside
TPS65320-Q1
Figure 17. Small-Signal Model for Loop Response
Simple Small-Signal Model for Peak-Current Mode Control
Figure 18 describes a simple small-signal model that one can use to understand how to design the frequency
compensation. A voltage-controlled current source (duty cycle modulator) supplying current to the output
capacitor and load resistor can approximate the TPS65320-Q1 power stage. Equation 5 shows the control-to-
output transfer function, which consists of a dc gain, one dominant pole, and one ESR zero. The quotient of the
change in switch current divided by the change in COMP pin voltage (node c in Figure 17) is the power-stage
transconductance. The gm_PS for the TPS65320-Q1 is 10.5 S. The low-frequency gain of the power stage is the
product of the transconductance and the load resistance as shown in Equation 6.
As the load current increases and decreases, the low-frequency gain decreases and increases, respectively. This
variation with the load may seem problematic at first, but the dominant pole moves with the load current (see
Equation 7). The dashed line in the right half of Figure 18 highlights the combined effect. As the load current
decreases, the gain increases and the pole frequency lowers, keeping the 0-dB crossover frequency the same
for the varying load conditions, which makes it easier to design the frequency compensation. The type of output
capacitor chosen determines whether the ESR zero has a profound effect on the frequency compensation
design. Using high-ESR aluminium electrolytic capacitors may reduce the number of frequency-compensation
components needed to stabilize the overall loop because the phase margin increases from the ESR zero at the
lower frequencies (see Equation 8).
VO
Vc
Resr
RL
gmps = 10.5 S
Cout
Adc
fP
fZ
Figure 18. Simple Small-Signal Model and Frequency Response for Peak-Current Mode
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