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TPS65100_07 Datasheet, PDF (15/32 Pages) Texas Instruments – TRIPLE OUTPUT LCD SUPPLY WITH LINEAR REGULATOR AND VCOM BUFFER
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TPS65100, TPS65101
TPS65105
SLVS496C – SEPTEMBER 2003 – REVISED APRIL 2006
Converter Loop Design and Stability
The TPS6510x series converter loop can be externally compensated and allows access to the internal
transconductance error amplifier output at the COMP pin. A small feedforward capacitor across the upper
feedback resistor divider speeds up the circuit as well. To test the converter stability and load transient
performance of the converter, a load step from 50 mA to 250 mA is applied, and the output voltage of the
converter is monitored. Applying load steps to the converter output is a good tool to judge the stability of such a
boost converter.
Design Procedure Quick Steps
1. Select the feedback resistor divider to set the output voltage.
2. Select the feedforward capacitor to place a zero at 50 kHz.
3. Select the compensation capacitor on pin COMP. The smaller the value, the higher the low frequency gain.
4. Use a 50-kΩ potentiometer in series to Cc and monitor Vout during load transients. Fine tune the load
transient by adjusting the potentiometer. Select a resistor value that comes closest to the potentiometer
resistor value. This needs to be done at the highest Vin and highest load current since the stability is most
critical at these conditions.
Setting the Output Voltage and Selecting the Feedforward Capacitor
The output voltage is set by the external resistor divider and is calculated as:
ƪ ƫ Vout + 1.146 V
1
)
R1
R2
Across the upper resistor a bypass capacitor is required to speed up the circuit during load transients as shown
in Figure 15.
VO1
D1
Up to 10 V/150 mA
C8
6.8 pF
R1
SW
430 kΩ
SW
FB1
SUP
C2 0.22 µF
C2+
C2−/MODE
R2
56 kΩ
C4
22 µF
Figure 15. Feedforward Capacitor
Together with R1 the bypass capacitor C8 sets a zero in the control loop at approximately 50 kHz:
ƒz + 2
1
p C8
R1
A value closest to the calculated value should be used. Larger feedforward capacitor values reduce the load
regulation of the converter and cause load steps as shown in Figure 16.
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