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TMS320F28044 Datasheet, PDF (15/105 Pages) Texas Instruments – Digital Signal Processor
◁
TMS320F28044
www.ti.com
NAME
VDD
VDD
VDD
VDD
VDD
VDD
VDDIO
VDDIO
VDDIO
VDDIO
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
GPIO0
EPWM1A
-
-
GPIO1
EPWM2A
-
-
GPIO2
EPWM3A
-
-
GPIO3
EPWM4A
-
-
GPIO4
EPWM5A
-
-
GPIO5
EPWM6A
-
-
Digital Signal Processor
SPRS357A – AUGUST 2006 – REVISED OCTOBER 2006
Table 2-2. Signal Descriptions (continued)
PIN NO.
PZ
PIN #
GGM/
ZGM
BALL #
DESCRIPTION (1)
10
E2
42
G6
59
F10
CPU and Logic Digital Power Pins (1.8 V)
68
D7
85
B6
93
D4
3
C2
46
H7
Digital I/O Power Pin (3.3 V)
65
E9
82
A7
2
B1
11
E3
41
H6
49
K9
55
H10
62
F7 Digital Ground Pins
69
D10
77
A9
87
D6
89
A5
94
A4
GPIOA AND PERIPHERAL SIGNALS(2)
General purpose input/output 0 (I/O/Z) (3)
47
K8
Enhanced PWM1 Output and HRPWM channel (O)
-
-
General purpose input/output 1 (I/O/Z)(3)
44
K7
Enhanced PWM2 Output A and HRPWM channel (O)
-
-
General purpose input/output 2 (I/O/Z)(3)
45
J7
Enhanced PWM3 Output A and HRPWM channel (O)
-
-
General purpose input/output 3 (I/O/Z)(3)
48
J8
Enhanced PWM4 Output A and HRPWM channel (O)
-
-
General purpose input/output 4 (I/O/Z)(3)
51
J9
Enhanced PWM5 output A and HRPWM channel (O)
-
-
General purpose input/output 5 (I/O/Z)(3)
53
H9
Enhanced PWM6 Output A and HRPWM channel (O)
-
-
(2) All GPIO pins are I/O/Z, 4-mA drive typical (unless otherwise indicated), and have an internal pullup, which can be selectively
enabled/disabled on a per-pin basis. This feature only applies to the GPIO pins. The GPIO function (shown in Italics) is the default at
reset. The peripheral signals that are listed under them are alternate functions.
(3) The pullups on GPIO0-GPIO15 pins are not enabled at reset.
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