TLC5924 Datasheet, PDF (15/23 Pages) Texas Instruments – 16-CHANNEL LED DRIVER WITH DOT CORRECTION AND PRE-CHARGE FET

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Figure 15 shows the timing chart of reading LOD data.
MODE
XLAT
TLC5924
SLVS626 – JUNE 2006
At the rising edge of XLAT while BLANK=L, LOD status is latched into
the internal edge-triggered register.
When XLAT=H, the internal edge-triggered register
sets or resets the input shift registe. r
SCLK
SIN
SOUT
BLANK
OUT0
OUT15
XERR
1510ns max
tpd2: 60ns max
td x 15 = 450ns max
LED open
tpd4: 1000ns max
>1000ns
1510ns max
tpd2: 60ns max
td x 15 = 450ns max
tpd4: 1000ns max
>1000ns
Figure 15. Timing Chart of Reading LOD Data
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