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TCA6424_10 Datasheet, PDF (15/29 Pages) Texas Instruments – LOW-VOLTAGE 24-BIT I2C AND SMBus I/O EXPANDER WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
TCA6424
www.ti.com
SCPS175A – NOVEMBER 2007 – REVISED NOVEMBER 2009
I2C INTERFACE TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 10)
STANDARD MODE
I2C BUS
FAST MODE
I2C BUS
fscl
tsch
tscl
tsp
tsds
tsdh
ticr
ticf
tocf
tbuf
tsts
tsth
tsps
tvd(data)
tvd(ack)
I2C clock frequency
I2C clock high time
I2C clock low time
I2C spike time
I2C serial data setup time
I2C serial data hold time
I2C input rise time
I2C input fall time
I2C output fall time; 10 pF to 400 pF bus
I2C bus free time between Stop and Start
I2C Start or repeater Start condition setup time
I2C Start or repeater Start condition hold time
I2C Stop condition setup time
Valid data time; SCL low to SDA output valid
Valid data time of ACK condition; ACK signal from SCL low to SDA
(out) low
MIN
MAX
MIN
MAX
0
100
0
400
4
0.6
4.7
1.3
0
50
0
50
250
100
0
0
1000 20 + 0.1Cb (1)
300
300 20 + 0.1Cb (1)
300
300 20 + 0.1Cb (1)
300
4.7
1.3
4.7
0.6
4
0.6
4
0.6
1
1
1
1
UNIT
kHz
μs
μs
ns
ns
ns
ns
ns
μs
μs
μs
μs
μs
μs
μs
(1) Cb = total capacitance of one bus line in pF
RESET TIMING REQUIREMENTS
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 13)
STANDARD MODE
I2C BUS
MIN
MAX
tW
Reset pulse duration
4
tREC Reset recovery time
0
tRESET Time to reset(1)
600
(1) Minimum time for SDA to become high or minimum time to wait before doing a START.
FAST MODE
I2C BUS
MIN
MAX
4
0
600
UNIT
ns
ns
ns
Copyright © 2007–2009, Texas Instruments Incorporated
Product Folder Link(s): TCA6424
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