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PCA9539 Datasheet, PDF (15/34 Pages) NXP Semiconductors – 16-bit I2C and SMBus, low power I/O port with interrupt and reset
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PCA9539
REMOTE 16-BIT I2C AND SMBus LOW-POWER I/O EXPANDER
WITH INTERRUPT OUTPUT, RESET, AND CONFIGURATION REGISTERS
SCPS130D – AUGUST 2005 – REVISED MARCH 2007
I2C Interface Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 11)
fscl
tsch
tscl
tsp
tsds
tsdh
ticr
ticf
tocf
tbuf
tsts
tsth
tsps
tvd(data)
tvd(ack)
Cb
I2C clock frequency
I2C clock high time
I2C clock low time
I2C spike time
I2C serial-data setup time
I2C serial-data hold time
I2C input rise time
I2C input fall time
I2C output fall time
10-pF to 400-pF bus
I2C bus free time between Stop and Start
I2C Start or repeated Start condition setup
I2C Start or repeated Start condition hold
I2C Stop condition setup
Valid-data time
SCL low to SDA output valid
Valid-data time of ACK condition
ACK signal from SCL low to SDA (out) low
I2C bus capacitive load
MIN
0
0.6
1.3
100
0
20 + 0.1Cb(1)
20 + 0.1Cb(1)
20 + 0.1Cb(1)
1.3
0.6
0.6
0.6
50
0.1
MAX
400
50
300
300
300
0.9
400
UNIT
kHz
µs
µs
ns
ns
ns
ns
ns
ns
µs
µs
µs
µs
ns
µs
pF
(1) Cb = total capacitance of one bus line in pF
RESET Timing Requirements
over recommended operating free-air temperature range (unless otherwise noted) (see Figure 14)
MIN
tW
Reset pulse duration
6
tREC
Reset recovery time
0
tRESET
Time to reset
400
MAX
UNIT
ns
ns
ns
Switching Characteristics
over recommended operating free-air temperature range, CL ≤ 100 pF (unless otherwise noted) (see Figure 12 and
Figure 13)
PARAMETER
tiv
Interrupt valid time
tir
Interrupt reset delay time
tpv
Output data valid
tps
Input data setup time
tph
Input data hold time
FROM
(INPUT)
P port
SCL
SCL
P port
P port
TO
(OUTPUT)
INT
INT
P port
SCL
SCL
MIN
MAX
4
4
200
150
1
UNIT
µs
µs
ns
ns
µs
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