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OPA180_15 Datasheet, PDF (15/38 Pages) Texas Instruments – Drift, Low-Noise, Rail-to-Rail Output, 36-V, Zero-Drift Operational Amplifiers
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OPA180, OPA2180, OPA4180
SBOS584D – NOVEMBER 2011 – REVISED MAY 2014
Feature Description (continued)
8.3.4 Capacitive Load and Stability
The dynamic characteristics of the OPAx180 have been optimized for a range of common operating conditions.
The combination of low closed-loop gain and high capacitive loads decreases the phase margin of the amplifier
and can lead to gain peaking or oscillations. As a result, heavier capacitive loads must be isolated from the
output. The simplest way to achieve this isolation is to add a small resistor (for example, ROUT equal to 50 Ω) in
series with the output. Figure 27 and Figure 28 illustrate graphs of small-signal overshoot versus capacitive load
for several values of ROUT. Also, refer to the Applications Report, Feedback Plots Define Op Amp AC
Performance (SBOA015), available for download from the TI website, for details of analysis techniques and
application circuits.
40
ROUT = 0 W
35
ROUT = 25 W
30
ROUT = 50 W
25
20
15
G=1
18 V
10
Device
ROUT
-18 V
RL
CL
5
0
0 100 200 300 400 500 600 700 800 900 1000
Capacitive Load (pF)
RL = 10 kΩ
Figure 27. Small-Signal Overshoot Versus Capacitive Load
(100-mV Output Step)
40
ROUT = 0 W
35
ROUT = 25 W
30
ROUT = 50 W
25
20
15
10
5
0
0
G = -1 RI = 10 kW RF = 10 kW
18 V
Device
-18 V
ROUT
CL
100 200 300 400 500 600 700 800 900 1000
RL = 10 kΩ
Capacitive Load (pF)
Figure 28. Small-Signal Overshoot Versus Capacitive Load
(100-mV Output Step)
8.3.5 Electrical Overstress
Designers often ask questions about the capability of an operational amplifier to withstand electrical overstress.
These questions tend to focus on the device inputs, but may involve the supply voltage pins or even the output
pin. Each of these different pin functions have electrical stress limits determined by the voltage breakdown
characteristics of the particular semiconductor fabrication process and specific circuits connected to the pin.
Additionally, internal electrostatic discharge (ESD) protection is built into these circuits to protect them from
accidental ESD events both before and during product assembly.
These ESD protection diodes also provide in-circuit, input overdrive protection, as long as the current is limited to
10 mA as stated in the Absolute Maximum Ratings. Figure 29 shows how a series input resistor may be added to
the driven input to limit the input current. The added resistor contributes thermal noise at the amplifier input and
its value should be kept to a minimum in noise-sensitive applications.
V+
IOVERLOAD
10 mA max
VIN
5 kW
Device
VOUT
Figure 29. Input Current Protection
An ESD event produces a short duration, high-voltage pulse that is transformed into a short duration, high-
current pulse as it discharges through a semiconductor device. The ESD protection circuits are designed to
provide a current path around the operational amplifier core to prevent it from being damaged. The energy
absorbed by the protection circuitry is then dissipated as heat.
Copyright © 2011–2014, Texas Instruments Incorporated
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Product Folder Links: OPA180 OPA2180 OPA4180