English
Language : 

LMH6551Q_15 Datasheet, PDF (15/26 Pages) Texas Instruments – Differential, High Speed Op Amp
LMH6551Q
www.ti.com
SNOSB95E – NOVEMBER 2011 – REVISED MARCH 2013
SINGLE SUPPLY OPERATION
The input stage of the LMH6551Q has a built in offset of 0.7V towards the lower supply to accommodate single
supply operation with single ended inputs. As shown in Figure 30, the input common mode voltage is less than
the output common voltage. It is set by current flowing through the feedback network from the device output. The
input common mode range of 0.4V to 3.2V places constraints on gain settings. Possible solutions to this
limitation include AC coupling the input signal, using split power supplies and limiting stage gain. AC coupling
with single supply is shown in Figure 31.
In Figure 30 closed loop gain = VO / VI ≊ RF / RG, where VI =VS / 2, as long as RM << RG. Note that in single
ended to differential operation VI is measured single ended while VO is measured differentially. This means that
gain is really 1/2 or 6 dB less when measured on either of the output pins separately. Additionally, note that the
input signal at RT (labeled as VI) is 1/2 of VS when RT is chosen to match RS to RIN.
VICM = Input common mode voltage = (VI1+VI2) / 2.
RF
RS
a VI
RG
RT VCM
RG
RM
VI1
+
-
VI2
RF
RO
VO1
CL RL VO
VO2
RO
VO1 + VO2
*VCM =
2
*BY DESIGN
VICM = VOCM
VI1 + VI2
VICM =
2
Figure 31. AC Coupled for Single Supply Operation
DRIVING ANALOG TO DIGITAL CONVERTERS
Analog to digital converters (ADC) present challenging load conditions. They typically have high impedance
inputs with large and often variable capacitive components. As well, there are usually current spikes associated
with switched capacitor or sample and hold circuits. Figure 32 shows a typical circuit for driving an ADC. The two
56Ω resistors serve to isolate the capacitive loading of the ADC from the amplifier and ensure stability. In
addition, the resistors form part of a low pass filter which helps to provide anti alias and noise reduction
functions. The two 39 pF capacitors help to smooth the current spikes associated with the internal switching
circuits of the ADC and also are a key component in the low pass filtering of the ADC input. In the circuit of
Figure 32 the cutoff frequency of the filter is 1/ (2*π*56Ω *(39 pF + 14pF)) = 53MHz (which is slightly less than
the sampling frequency). Note that the ADC input capacitance must be factored into the frequency response of
the input filter, and that being a differential input the effective input capacitance is double. Also as shown in
Figure 32 the input capacitance to many ADCs is variable based on the clock cycle. See the data sheet for your
particular ADC for details.
Copyright © 2011–2013, Texas Instruments Incorporated
Product Folder Links: LMH6551Q
Submit Documentation Feedback
15