TMS320C2810 Datasheet, PDF (141/162 Pages) Texas Instruments – Digital Signal Processors

Electrical Specifications
SINAD
SNR
THD (100 kHz)
ENOB (SNR)
SFDR
Table 6−43. AC Specifications
PARAMETER
Signal-to-noise ratio + distortion
Signal-to-noise ratio
Total harmonic distortion
Effective number of bits
Spurious free dynamic range
MIN TYP MAX UNIT
62
dB
62
dB
−68
dB
10.1
Bits
69
dB
6.30.3 Current Consumption for Different ADC Configurations (at 25-MHz ADCCLK)^‡
IDDA (TYP)§
40 mA
IDDAIO (TYP)
1 µA
IDD1 (TYP)
0.5 mA
ADC OPERATING MODE/CONDITIONS
Mode A (Operational Mode):
− BG and REF enabled
− PWD disabled
Mode B:
7 mA
0
5 µA
− ADC clock enabled
− BG and REF enabled
− PWD enabled
Mode C:
1 µA
0
5 µA
− ADC clock enabled
− BG and REF disabled
− PWD enabled
Mode D:
1 µA
0
0
− ADC clock disabled
− BG and REF disabled
− PWD enabled
‡ _{Test Conditions: SYSCLKOUT = 150 MHz}
ADC module clock = 25 MHz
ADC performing a continuous conversion of all 16 channels in Mode A
§ _{IDDA − includes current into VDDA1 / VDDA2 and AVDDREFBG}
April 2001 − Revised December 2004
SPRS174L 139