TPS65000 Datasheet, PDF (14/32 Pages) Texas Instruments – 2.25 MHz Step Down Converter with Dual LDOs and SVS

TPS65000, TPS65001, TPS650001
TPS650003, TPS650006, TPS650061
SLVS810A – JUNE 2009 – REVISED OCTOBER 2009
Output voltage
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V_OUT(nom) + 1%
Light load
PFM Mode
V_OUT(nom)
moderate to heavy load
PWM Mode
Time
Figure 22. PFM Voltage Positioning
Pulling the MODE pin to DC ground will result in automatic transition between PFM and PWM modes to
maximize efficiency.
The DCDC converter output automatically discharges to ground through an internal 450Ω load when EN_DCDC
goes low or when the UVLO condition is met.
SOFT START
The step-down converter has an internal soft start circuit that limits the inrush current during start-up. During soft
start, the output voltage ramp up is controlled as shown in Figure 23.
EN
90%
10%
V_OUT
t_Start
t_RAMP
Figure 23. Soft Start
LINEAR REGULATORS
The two linear dropout regulators (LDOs) in the TPS65000 and TPS65001 are designed to provide flexibility in
system design. Each LDO has a separate voltage input and enable signal. The input can be tied to the output of
the step-down converter or the output of another voltage source. Each LDO output discharge to ground
automatically when EN_LDOx goes low.
A resistor network is needed to set the output voltage of the LDOs. Fixed voltage output versions are also
available; contact Texas Instruments sales representative for more information.
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Product Folder Link(s): TPS65000 TPS65001 TPS650001 TPS650003 TPS650006 TPS650061