TLE4275-Q1_15 Datasheet, PDF (14/28 Pages) Texas Instruments – TLE4275-Q1 5-V Low-Dropout Voltage Regulator

TLE4275-Q1
SLVS647I – AUGUST 2006 – REVISED NOVEMBER 2014
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10.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
• Output voltage
• Output current rating
• Output capacitor
• Power-up reset delay time
10.2.2.1 Power-Up Reset Capacitance
To calculate the power-up reset capacitance, use Equation 2.
t_d
=
C_delay ´ V_DU
I _D,c
C_delay t_d
=
t_d ´ I_D,c
V_DU
=
t_d ´ 5.5 ´10^-6
1.8
(2)
10.2.2.2 Thermal Consideration
Calculate the power dissipated by the device according to Equation 3.
P_T = I_O × (V_I – V_O) + V_I × I_Q
where
• P_T = Total power dissipation of the device.
• I_O = output current
• V_I = input voltage
• V_O = output voltage
(3)
After determining the power dissipated by the device, calculate the junction temperature from the ambient
temperature and the device thermal impedance.
T_J = T_A + R_θJA × P_T
(4)
10.2.3 Application Curves
Load = 200 mA, C_in = 22 µF, C_out = 10 µF
CH1：V_out, CH2: V_in, CH3: V_reset.
Figure 20. Power Up Waveform
CH1：V_out, CH2: V_in, CH3: V_reset.
Figure 21. Power Down Waveform
14
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