TIBPAL16L8-15C_08 Datasheet, PDF (14/24 Pages) Texas Instruments – HIGH-PERFORMANCE IMPACT PAL CIRCUITS

TIBPAL 16L8-15C, TIBPAL 16R4-15C, TIBPAL 16R6-15C, TIBPAL 16R8-15C
TIBPAL 16L8-20M, TIBPAL 16R4-20M, TIBPAL 16R6-20M, TIBPAL 16R8-20M
HIGH-PERFORMANCE IMPACT ™ PAL® CIRCUITS
SRPS019A – FEBRUARY 1984 – REVISED APRIL 2000
power-up reset (see Figure 2)
Following power up, all registers are set high. This feature provides extra flexibility to the system designer and
is especially valuable in simplifying state-machine initialization. To ensure a valid power-up reset, it is important
that the rise of V_CC be monotonic. Following power-up reset, a low-to-high clock transition must not occur until
all applicable input and feedback setup times are met.
VCC
4V
5V
tpd^†
(600 ns TYP, 1000 ns MAX)
Active-Low
Registered Output
1.5 V
tsu^‡
VOH
VOL
CLK
1.5 V
tw
VIH
1.5 V
VIL
† _{This is the power-up reset time and applies to registered outputs only. The values shown are from characterization data.}
‡ _{This is the setup time for input or feedback.}
Figure 2. Power-Up Reset Waveforms
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