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SN74GTLP2034 Datasheet, PDF (14/21 Pages) Texas Instruments – 8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SN74GTLP2034
8-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE REGISTERED TRANSCEIVER
WITH SPLIT LVTTL PORT AND FEEDBACK PATH
SCES353C – JUNE 2001 – REVISED SEPTEMBER 2001
DISTRIBUTED-LOAD BACKPLANE SWITCHING CHARACTERISTICS
The preceding switching characteristics table shows the switching characteristics of the device into a lumped load
(Figure 1). However, the designer’s backplane application is probably a distributed load. The physical representation
is shown in Figure 2. This backplane, or distributed load, can be closely approximated to a resistor inductance
capacitance (RLC) circuit, as shown in Figure 3. This device has been designed for optimum performance in this RLC
circuit. The following switching characteristics table shows the switching characteristics of the device into the RLC
load, to help the designer to better understand the performance of the GTLP device in this typical backplane. See
www.ti.com/sc/gtlp for more information.
1.5 V
.25”
1”
ZO = 50 Ω
1”
1.5 V
.25”
Conn.
Conn.
Conn.
Conn.
1”
1”
1”
1”
Drvr
Slot 1
Rcvr
Rcvr
Rcvr
Slot 2
Slot 19
Slot 20
Figure 2. High-Drive Test Backplane
1.5 V
From Output LL = 14 nH
Under Test
11 Ω
Test
Point
CL = 18 pF
Figure 3. High-Drive RLC Network
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